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TMS570LC4357: EMAC CPPI errata clarification

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hi there,

I'm looking at the errata "Write and reads to EMAC CPII memory are byte swapped on big endian device (TMS570)". Given that TMS570 is BE32, when it says byte swapped, does it mean that reads and writes are little-endian or BE-8?

I see this is already done in HalCoGen code so will check that next to confirm but I suppose it would be better to clarify that in the errata if it is little-endian, BE-8 or for certain specific sized read/writes.

Best regards,

Salyl

  • Hello Salyl,

    Yes, TMS570 is BE32. But the EMAC controller on TMS570LC43x device only supports the descriptors in little endian format.

    For byte access:

    Data Bus                31~24           23~16           15~8           7~0

    Little endian             A3                  A2                A1              A0

    BE32                         A0                  A1                A2              A3  

  • Hi QJ,

    Thanks for your prompt response. This works in that as long as we just take care of the swapping before 32-bit writes and after 32-bit reads. However, I was  also looking at your HalCoGen code for EMAC and it seems to be doing that as well but the comment left in that code mentions BE-8 as opposed to little-endian.

    I was working on emulating TMS570 so it doesn't matter much and just swapping works fine. However, for a broader discussion, mentioning BE-8 in HalCoGen code will keep many open questions given that BE-8 started in a later version of ARM architecture and generally speaking, one would expect BE-8 to be used for Cortex R5 since it is relatively newer version of ARM architecture. 

    For the case you describe, Little-endian and BE-8 work the same way so no issues but there are other cases where one would want to clarify access sizes (8-bit, 16-bit, 32-bit, 64-bit etc.) for the sake of completeness.

    A good application note for this problem might be a good idea that covers all endianness issues for TMS570 as it relates to BE32, BE-8, Little-endian, EMAC CPPI, EMIF, the ARM CP15, SCTLR registers etc. to leave things clean and unambiguous.

    Thanks,

    Saly

  • Thanks for good suggestions.

  • Hi QJ Wang,

    You are welcome! Do you think we can get a concise document with above information any time soon? I'm asking because, I want to bring a closure to this in order to check if I'm emulating as close as possible to the actual TMS570.

    Speaking of which, does TI have a QEMU port for TMS570 with these nuances implemented?

    Best regards,

    Salyl

  • Hello Salyl,

    The datasheet and TRM mention that this device supports BE32:

    1. Datasheet:


    2. TRM:

    3. EMIF.

    The EMIF on TMS570 supports BE8.

    4. The EMAC CPPI should support descriptor in BE32 format, but as mentioned in errata, the descriptor is in little endian format. We will add a notes in HALCoGen release note to correct the comments (BE8).

  • Hi QJ Wang,

    Okay, adding a note in Halcogen code and/or release note will work. Thanks for your support!

    Best regards,

    Salyl