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TM4C1294NCPDT: Power up timing

Joe Gleason
Prodigy 220 points
Part Number: TM4C1294NCPDT

Hi, I am trying to find out what the maximum turn on time allowed for the TM4C1294NCPDT for VDD, VDDA, and VBAT?

Thanks!

  • 0
    TI__Guru 72500 points

    By "maximum turn on time" do you mean a minimum voltage ramp time? If so, there is none. 

  • 0 in reply to Bob Crosby
    Guru 117855 points

    Greetings - and like you - team here thought of  'Rising, Voltage Ramps.'    

    However - might the 'Power/Voltage Sequencing' better represent this poster's question?     Our belief - gleaned from many MCUs (over past 25+ years) and five different ARM MCU Vendors (over the past ten years) reveals:

    • VDD should be first to arrive in 'full force' (i.e. to spec) ... even though - especially though - the capacitive load upon VDD is highest.
    • VDDA  (when independent from VDD) should arrive only AFTER VDD has reached its specified level.   (that's our firm's well experienced/documented belief)   The MCU was never intended to be (majority) powered by VDDA!    Repeatedly we have observed this as a 'certified MCU Killer' - across a variety of MCU Vendors!

    Special circuit design IS normally required - if/when VDDA is not directly derived (or tied) to VDD.   (this so VDDA does not 'lead' VDD in reaching spec.)

    Joining VDDA to VDD 'solves' the 'power sequencing' issue - yet compromises most all of the MCU's analog features.    (Digging beneath the surface (as illustrated here) - reveals not always - the most pleasant of pictures.)    And all MCU Vendors 'share' this vulnerability' - and choose to then, 'deal with or avoid' - as is their (usual) custom/practice...