This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TM4C123AH6PM: Datasheet clarification on uDMA and NVIC

Part Number: TM4C123AH6PM

Datasheet section 8.2.8 (page 545) states: "When using μDMA to transfer data to and from a peripheral, the peripheral must disable all interrupts to the NVIC."

Two questions:

1) Does that happen automatically or is this something that software must tell the peripheral to do?

2) If an interrupt would occur during the DMA transfer, what happens to it? Is it lost? Is it delayed until completion of the DMA transfer?

Thanks

  • Hello twelve12pm,

    So... that's a great question upon which looking up how to answer, I stumbled across this... 

    ...If it helps any, I've stumbled across many of my own posts and sat there for a moment wondering 'wait I knew all that two years ago? Huh...' :)

  • Ralph Jacobi said:
    ...If it helps any, I've stumbled across many of my own posts and sat there for a moment wondering 'wait I knew all that two years ago? Huh...' :)

    That's a GREAT Quote - and likely many others & (especially) myself - have found ourselves in that (same) boat!     Dreaded 'short-term learning' (cram for finals) lives.    Might this poster - in this instance - have been, 'Hoisted with his own petard?'

  • It seems I asked exactly the same question twice... Deja vu.

    "A deja vu is a glitch in the Matrix. It happens when they change something."

    Thanks for your help!