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CCS: TMS570LC4357 - Question about SafeTi Library linker and mpu.asm

Other Parts Discussed in Thread: TMS570LC4357, HALCOGEN

Tool/software: Code Composer Studio

Hello, I use SafeTi library with version 2.4.0. And I have some question about relation between linker.cmd and HL_sys_mpu.asm.

1. In SafeTI Diagnostic Library, The used linker cmd file is "SL_TMS570LC4357_NoOS_sys_link.cmd" in path \build\TMS570LC4357_NoOS.

   And mpu asm file is HL_sys_mpu.asm in path \demo_app\HALCoGen\TMS570LC4357_NoOS\source

    Is it right?

2. if the question 1. is right, I think the mpu setting is different between two files. It is no matter to act?

example : in the HL_sys_mpu.asm

the register set follows.

r1Base  .word 0x00000000
r2Base  .word 0x00000000
r3Base  .word 0x08000000
r4Base  .word 0x08400000
r5Base  .word 0x60000000
r6Base  .word 0x80000000
r7Base  .word 0xF0000000
r8Base  .word 0xFC000000
r9Base  .word 0xFE000000
r10Base  .word 0xFF000000
r11Base  .word 0x08001000
r12Base  .word 0x20000000
r13Base  .word 0xF0000000
r14Base  .word 0xF8000000
r15Base  .word 0xF8000000
r16Base  .word 0xF0000000

But in the linker cmd file, the register is set more details

/* Memory Map                                                                 */

MEMORY
{

    VECTORS (X)    : origin=0x00000000 length=0x00000020
    FLASH0  (RX)   : origin=0x00000020 length=0x001FFFE0
    FLASH1  (RX)   : origin=0x00200000 length=0x00200000

    STACKS  (RW)   : origin=0x08020000 length=0x00001800
    RAM (RW)   : origin=0x8021800 length=0x19000
    HIGH_HANDLER     (RWX)  : origin=0x803A800 length=0x000800
    PROFILE(RW)    : origin=0x803B000 length=0x00008000 /* Added for profiling purposes */
    LOG (RW)    : origin=0x8043000 length=0x00002000 fill=0xDEADBEEF/* Added for logging purposes */
    FEE (R)    : origin=0xF0200000 length=0x00000064 fill=0xDEADBEEF /* For FEE testing, Valid only for sample application */

}

3. Can i know about the HL_sys_mpu.asm file is acted in details?

I anaylze the mpu file as follows. ( Please, add the comments the line where i don't know)

        ; Setup region
        mov   r0,  #2   
        mcr   p15, #0,    r0, c6, c2, #0
        ldr   r0,  r3Base                             // this is start addr
        mcr   p15, #0,    r0, c6, c1, #0
        mov   r0,  #0x0008                        // mpu region type
        orr   r0,  r0,    #0x0300                  // mpu region access permition
        mcr   p15, #0,    r0, c6, c1, #4
        movw  r0,  #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 <<  9) + (0 <<  8) + (0x11 << 1) + (1))
        mcr   p15, #0,    r0, c6, c1, #2

Regards,

Minwoo

  • Hello Minwoo

    1. You are right.

    2. rxBase in  HL_sys_mpu.asm defines the start address of the MPU region. The Linker cmd file is to form the output sections and allocate the output sections to memories (SECTIONS {}). Those memories defined in MEMORY directives are used to allocate the sections.

    The MPU is to partition memory into regions (different from the sections used in linker cmd file) and set individual protection attributes for each region (up to 16 for LC4357 device). Each region is programmed with a base address and size, and the regions can be overlapped. You can define your own MPU regions using different start address (or base address) and region size. The base address must be a multiple of 8KB.

    BTW, there is no direct relationship between MPU base address and the memories defined in Linker cmd file.

    3. Please refer to ARM TRM. I added comments in blue:

            mov   r0,  #2   
            mcr   p15, #0,    r0, c6, c2, #0    // Write MPU Memory Region Number Register


            ldr   r0,  r3Base                             // this is start addr
            mcr   p15, #0,    r0, c6, c1, #0  // Write MPU Region Base Address Register


            mov   r0,  #0x0008                        // mpu region type
            orr   r0,  r0,    #0x0300                  // mpu region access permition
            mcr   p15, #0,    r0, c6, c1, #4       // Write Region access control Register


            movw  r0,  #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 <<  9) + (0 <<  8) + (0x11 << 1) + (1))                               // bit [5:1] is region size, and bit 0 is ENABLE bit

                                                                  //b10001 or 0x11 is 256KB
            mcr   p15, #0,    r0, c6, c1, #2        // Write Data MPU Region Size and Enable Register