Other Parts Discussed in Thread: HALCOGEN,
Hi ,
Following are some of the SILICON ERRATA on TMS570LS3137 that needs to be Respected in our code . DEVICE#B066 is handled by the HALCOGEN but all others are still unclear how are these to be handled . Is there sample source code and other details how to handle these ERRATA .
| TMS570 errata issues | If CPU Abort on Write to Unimplemented MCRC Space is used, then the TMS570 Silicon Errata issue DEVICE#142 should be taken into account | |||
| TMS570 errata issues | If PSCON Compare is used, then the TMS570 Silicon Errata issue DEVICE#142 should be taken into account | |||
| TMS570 errata issues | If Write to External Memory using Store-Multiple (STMxx) CPU instruction is used, then the TMS570 Silicon Errata issue DEVICE#B064 should be taken into account | |||
| TMS570 errata issues | If a RTP automatically restart transmitting trace data after an overflow condition is corrected is expected, then the TMS570 Silicon Errata issue DEVICE#B065 should be taken into account | |||
| TMS570 errata issues | If the Executing from Flash is used, then the TMS570 Silicon Errata issue DEVICE#B066 should be taken into account | HALCOGEN Provides Solution source code | ||
| TMS570 errata issues | If write to peripheral or external memory is used, then the TMS570 Silicon Errata issue DEVICE#B071 should be taken into account | |||
| TMS570 errata issues | If Internal pull on MibSPI3_nCS[1] when ECLK is made an output is used, then the TMS570 Silicon Errata issue DEVICE#B074 should be taken into account | |||
| TMS570 errata issues | If BUSY Flag When DMM Starts Receiving A Packet is used, then the TMS570 Silicon Errata issue DMM#16 should be taken into account | |||
| TMS570 errata issues | If EMIF on register read after time-out error is used, then the TMS570 Silicon Errata issue EMIF#3 should be taken into account | |||
| TMS570 errata issues | If Write to external asynchronous memory configured as “normal” is used, then the TMS570 Silicon Errata issue EMIF#4 should be taken into account | |||
| TMS570 errata issues | Erroneous Cycle Offset During Startup after abort of startup or normal operation regarding to the TMS570 Silicon Errata issue ERAY#58 should be taken into account | |||
| TMS570 errata issues | If Write to Implemented CRC Space After Write to Unimplemented CRC Space is used, then the TMS570 Silicon Errata issue MCRC#18 should be taken into account |
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| TMS570 errata issues | If Multibuffered SPI in Slave Mode In 3- or 4-Pin Communication Transmits Data for Slow SPICLK Frequencies and for Clock Phase = 1 is used, then the TMS570 Silicon Errata issue MIBSPI#110 should be taken into account | |||
| TMS570 errata issues | If Data Length In Slave Mode when I/O Loopback is Enabled is used, then the TMS570 Silicon Errata issue MIBSPI#111 should be taken into account | |||
| TMS570 errata issues | If RX DMA REQ from a Slave mode MIBSPI is used, then the TMS570 Silicon Errata issue MIBSPI#137 should be taken into account | |||
| TMS570 errata issues | If Mibspi RX RAM RXEMPTY bit after reading is used, then the TMS570 Silicon Errata issue MIBSPI#139 should be taken into account | |||
| TMS570 errata issues | PLL Fails to Start regarding to the TMS570 Silicon Errata issue SSWF021#45 should be taken into account | |||
| TMS570 errata issues | If Clock Source Switching With Clock Source Enable And Clock Source Valid is used, then the TMS570 Silicon Errata issue SYS#046 should be taken into account | |||
| TMS570 errata issues | If Bit field EFUSE_Abort[4:0] in SYSTASR register is used, then the TMS570 Silicon Errata issue SYS#102 should be taken into account |
