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TM4C1290NCPDT: ISR on PQ2

Priya Nadathur70
Expert 2795 points
Part Number: TM4C1290NCPDT

startup_ccs.c file

 IntDefaultHandler,                      // GPIO Port Q (Summary or Q0)

 ResetDebugISR,                      // GPIO Port Q2

I need to check if interrupt on PQ2 has triggered.. Is the API for interrupt status correct?

I don't have any other interrupt on port Q except on pin PQ2.

Thanks,

Priya

void ResetDebugGPIO_Initialize(void)
{
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);
    resetDbgIntTriggered = 0;
      //Set Pin as input
    GPIOPinTypeGPIOInput(GPIO_PORTQ_BASE, GPIO_PIN_2);
    GPIOIntRegisterPin(GPIO_PORTQ_BASE, GPIO_PIN_2, ResetDebugISR); //Temp Disable 09-20-2017
    GPIOIntTypeSet(GPIO_PORTQ_BASE, GPIO_PIN_2, GPIO_RISING_EDGE);
    GPIOIntEnable(GPIO_PORTQ_BASE, GPIO_PIN_2);
}
void ResetDebugISR(void)
{
    bool bMasked = false;
    uint32_t intStatus = 0;
        //Check if this is a GPIO Interrupt
        intStatus = GPIOIntStatus(GPIO_PORTQ_BASE, bMasked);
        if((intStatus & GPIO_PIN_2) == GPIO_PIN_2)
        {
            //CLEAR THE INTERUPT
            resetDbgIntTriggered = 1;
            GPIOIntClear(GPIO_PORTQ_BASE, GPIO_PIN_2);
            GPIOIntDisable(GPIO_PORTQ_BASE, GPIO_PIN_2);
            resetDbgIntTriggered = 0;
        }
}
//PN
edited to remove ROM defines
  • 0
    TI__Guru**** 190806 points

    Hi,

      I don't see a problem with your code with a quick glance. Do you see the interrupt tripped if you place a breakpoint on the ResetDebugISR?

      I assume somewhere in your code, not shown here will enable interrupt at the NVIC level and also enable the processor interrupt. 

      

  • 0 in reply to Charles Tsai
    Expert 2795 points

    No. That's the reason why I am having my code reviewed. I have requested a jumper at pin PQ2 to confirm on the scope when I trigger the ISR.

    Thanks,

    Priya

  • 0 in reply to Charles Tsai
    Expert 2795 points

      I assume somewhere in your code, not shown here will enable interrupt at the NVIC level and also enable the processor interrupt. 

    Can you show an example of this?

    IntMasterEnable is called before the while(){} loop begins

    IntPrioritySet(INT_GPIOQ2, (PRIORITY_LEVEL_1 ));     //PN

    GPIOIntRegisterPin API registers the PQ2 ISR.

    edited to add all init APIs

  • 0 in reply to Priya Nadathur70
    TI__Guru**** 190806 points

    Here is one example I have on the PJ0 pin looking for a falling edge to generate interrupt.

        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
    while(!(SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOJ)));
    GPIOPinTypeGPIOInput(GPIO_PORTJ_BASE, GPIO_PIN_0);
    GPIOPadConfigSet(GPIO_PORTJ_BASE, GPIO_PIN_0, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);
    GPIOIntTypeSet(GPIO_PORTJ_BASE, GPIO_PIN_0, GPIO_FALLING_EDGE);
    GPIOIntRegister(GPIO_PORTJ_BASE, SW1Handler);
    GPIOIntEnable(GPIO_PORTJ_BASE, GPIO_INT_PIN_0);
    IntEnable(INT_GPIOJ);
    //
    // Enable processor interrupts.
    //
    IntMasterEnable();

  • 0
    Guru 117855 points

    Greetings,

    Note:  Swear to God - Charles' post (above) was not present when I joined the thread.     Even so - it is believed that 'code alone' may not (fully) satisfy this poster.

    Priya Nadathur70 said:
    GPIOIntTypeSet(GPIO_PORTQ_BASE, GPIO_PIN_2, GPIO_RISING_EDGE);

    Should not pin 'PQ2' be equipped with:

    • either the MCU's (weak) pull-down (resistor) or an external one   (Charles' post included a 'pull-up')
    • and some method to, 'Generate a logic-high' - felt at PQ2     (this requirement was (yet) to be described)
    • it appears that 'PQ2' is presently 'floating' - which is 'never' good - and (even) worse when employed as a, 'Pin Interrupt.'    (Charles 'pull-up' resolved)

    It should be noted that if poster's application (demands) the detection of a 'Rising Edge' - the 'weak pull-up' w/in the verified code must be replaced w/'Weak pull-down')

    If a scope is not available you may program your ISR to 'toggle' another pin on Port_'Q' - and have that pin drive a (current-limited) Led.   (that will confirm that your ISR (was) entered.)

    Note that if a 'simple switch' is used to 'trigger the PQ2 interrupt' - that switch will (surely) 'bounce' - and the interrupt may be entered (several) times.    You may 'resolve that 'bounce' by employing (another) Port_Q pin  (set as output) to 'single pulse' PQ2...