Hi Team,
As per TRM,
Since the interrupt vector table may have an error, the FBPARERR register will provide to the VIC port,
IRQVECREG and FIQVECREG, a fall-back address to an ISR that can restore the interrupt vector table
content. The FBPARERR register should be set before initializing the interrupt in the interrupt vector table,
to avoid branching to an unpredictable location.
Question is: We need to enable esm group1 channel 15 in order to handle or execute vim parity handler method configured in FBPARERR register.
How this interrupt route gets triggered without executing esm low or high interrupt handler (based on configuration of esm group1 channel 15 during initialization).
VIM parity error -> esm group1 channel 15 status is set (when enabled) -> vim parity handler gets executed.
Could understand the reason for not going to esm low or high interrupt, since vim table itself is corrupted. But, is this documented clearly in TRM and how does core identifies vim parity error and execute handler method?
