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TMS570LS1227: How to set Chip Select Hold for a TMS570 configured as slave MibSPI when data to receive is > 16 bits

Fermat
Intellectual 270 points
Part Number: TMS570LS1227
Other Parts Discussed in Thread: HALCOGEN

Hello

I'm working with a TMS570 LS1227, configured as MibSPI slave, in a 4-wire comunication. The SPI master (an IMX6) sends out a frame of 60 bytes every 10 milliseconds.

I would like to use the MibSPI1 on the slave side.

I have configured the MibSPI1 as slave in Halcogen, setting Charlen = 16 in MibSPI Data Format 0 and Length = 30 for transfer Group 0.

Everything is fully working, on the slave side I can see the 60 bytes frame correctly received in 30 words of 16 bits. For each of the 30 word, the SPI master pulls down the Chip Select, transmits the 16bit data and then pulls up the Chip Select.

I would like to improve the performance of this communication (I want to shorten the time to trasmission/reception) , by setting the SPI master to keep the Chip Select low/enabled for all the 60 bytes frame (I mean Chip select driven low for all the 30 words and then driven high). On MibSPI slave side, which setting I have to do in Halcogen in order to cope with this communication pattern?

What I have to do  to manage the previously described communication pattern for MibSPI slave? Just select the "Chip Select Hold" in MIBSPI1 Transfer Group 0 to prepare the SPI slave?

Best regards

  • 0
    TI__Mastermind 21425 points

    Hello,

    If the CSHOLD bit in a buffer is set to 1, then the MIBSPI does not wait for nCS to be deactivated at the end of shift operation to copy the received data to the receive RAM (Section 28.2.11.2 in TRM).

    Please take a look at this thread:

  • 0 in reply to Miro
    Intellectual 270 points

    Hello

    I tried as you have indicated to set in Halcogen the Chip Select Hold checkbox in the Transfer Group 0, but I was unsuccessful.

    In the generated code the CSHOLD is set to 1. Then I rerun the test case, with the master driving the CS down for the whole 30 words. Unfortunately on the microcontroller, configured as SPI slave, I receive only the first word corrected. The next 29 words have wrong values. What could be wrong? Is enough, for the SPI slave, to program the Chip Select Hold checkbox in the Transfer Group 0 in HAlcogen? Do I have to change the value of some other register by program?

    Regards

    Is the CSHOLD feature supported in MibSPI Mode, when the TMS570 is  configured as SPI slave?

    Is the CSHOLD feature supported in SPI compatibility Mode, as SPI slave?

  • 0 in reply to Fermat
    Intellectual 270 points

    Fixed. The CSHOLD features fully works in MibSPI mode. I had to reduce the rate on the Master SPI side, and add some delay between the transfer buffers. No other changes on the slave side.

    Regards