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TMS570LS0714: Is DMA really available?RAM for Control Packet cannot be modified?

Part Number: TMS570LS0714
Other Parts Discussed in Thread: HALCOGEN, TMS570LS0914

Environment:

  • CCS 9.0.1
  • HALCoGen 4.7
  • TI Compiler 18.1.2.LTS
  • Custom Board
  • XDS220 USB Debugger

Problem: I cannot configure any control packet by writing any value into DMA RAM.

 

Details:

  • I cannot modify content within DMA RAM(starting from 0xFFF80000) via CCS Memory Window or C code;
  • All of DMA RAM are read as 0, via CCS Memory Window;
  • Tried with MPU on and off, same situation;
  • DMA Controller registers can be accessed normally, but without correct control packet, I cannot start any DMA transfer;

Misc:

I tried to access DMA RAM in the same way on my another launchpad-rm57l(RM57L843ZWT) evaluation board as well. I can directly change the values of DMA RAM starting from 0xFFF800000 via CCS Memory Window without any problem.

Help:

Can anyone help me?

Is there any essential configuration I've missed?

  • Sorry your question got missed earlier.

    TMS570LS0914 does indeed include a DMA controller. Please check the .gel file that is included with CCS to see if the DMA RAM is included in the memory map setup. I checked the .gel file on my installation and it is correct.

    Also, do you follow the start-up sequence generated by HALCoGen?

    Regards, Sunil

  • Hi, thanks for your reply.

    I did follow the start-up sequence generated by HALCoGen.

    I checked sys_startup.c as well, the memoryInit() function is called with DMA RAM mask enabled. And dmaParityCheck() function always runs without any error.

    The GEL file I used is provided by CCS. There is one line code for DMA RAM memory map:

    GEL_MapAdd(0xFFF80000, 0, 0x00001000, 1, 1);

    This code should be correct, I guess.

    But I still cannot modify any DMA RAM contents via CCS memory view or C codes like these:

    *(volatile uint32_t *)0xFFF80000 = 0x80000000;
    uint32_t read_back = *(volatile uint32_t *)0xFFF80000;

    The value read back is always 0.

  • I do not see the same behavior. Even on a part that is erased I am able to write to and read from the DMA RAM without any other configuration other than the memory map for the debugger.

    Please upload a CCS project that shows an issue writing to the DMA control packet RAM.

  • Any update on this issue from your side?

  • Hi, sorry for the delay.

    I retried as what you did, using the debugger connecting with the SoC that is erased. I can write DMA RAM correctly directly in Memory View!

    I debugged the start-up code that is generated by HALCoGen step by step. I found that before calling `MemoryInit()`, DMA RAM is good. But after that, I cannot modify DMA RAM anymore.

    Here is my test project:

    4135.tms570ls0714_dma_test.zip

  • Thanks. I see the issue now. The pbistStop() function generated by HCG is missing a reset for the PBIST controller. This prevents any other bus master (including the CPU) from writing to the memory. The memory initialization engine is the same as the PBIST controller.

    Please change the pbistStop() function to be as below:

    void pbistStop(void)
    {
    /* USER CODE BEGIN (20) */
    
        pbistREG->PACT = 0x0U;
        systemREG1->MSTGCR &= 0xFFFFFFF0U;
        systemREG1->MSTGCR |= 0xAU;
        systemREG1->MSTGCR &= 0xFFFFFFF0U;
        systemREG1->MSTGCR |= 0x5U;
    
    #if 0
    
    /* USER CODE END */
        /* disable pbist clocks and ROM clock */
        pbistREG->PACT = 0x0U;
        systemREG1->MSTGCR &= 0xFFFFFFF0U;
        systemREG1->MSTGCR |= 0x5U;
    /* USER CODE BEGIN (21) */
    
    #endif
    
    /* USER CODE END */
    }
    

    I will file a ticket on HALCoGen for this issue.

  • Thanks, I'll give it a try.