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CCS/TMDSRM48HDK: VIM Priority Encoding

Part Number: TMDSRM48HDK

Tool/software: Code Composer Studio

Hello TI,

i have one question regarding the VIM priority encoding. According to my undestanding, CHANCTRL is responsible for the mapping of the corresponding interrupt handler. In that case the priority encoding only takes affect when for example 2 interrupts trigger at the same time. In that case the interrupt handler with the lowest number has the highest priority. Moreover the CHANCTRL has an inital default state where each INTx is mapped accordingly.

TI provides an API VimChannelMap() in order to setup the VIM mapping order. But here i have one problem as that API directly works with interrupt handler itself and the interrupts of the RM48 are per default not interruptable, but you can make them with some SW overhead (e.g. dispatcher). So the API itself doesn't help here because the dispatcher is using the readback of the VIM IRQINDEX in order to find out what was the main trigger for the interrupt.

How do I modify the priority encoding when you are using a global interrupt dispatcher as I would like to allow nested interrupts. Is there something you need to take care of when using a global interrupt dispatcher which is doing the decoding of the interrupts in software via readback of the IRQINDEX? I just want to mention that I am not using FIQs apart for the reserved interrupts e.g. ESM etc.

When I play at CHANCTRL register in order to change the rticompare order, I got a really strange system behavior. For example when I change the order of rticompare0 and rticompare3, the calling order in my appliaction gets inverted. 

I am not sure if priority changes via the CHANCTRL register are applicable when the interrupt decoding is happening via IRQINDEX readbacks in the global interrupt dispatcher ?