CCS/TM4C1294NCPDT: How to debug energia sketch in ccs using J-link?

Hello,

bar shpilman said:

I having problems to debug it with Segger J-link, 

Can you provide more details on the problems you see? Is it a configuration issue? Is it a target connection issue? 

Any error messages or screenshots would be very helpful.

Thanks

ki

Are not the 'J-Link' and (low)  'energia'  -  an unexpected combination?     (i.e. One so Good - the other ...)

As you note - miniscule  data  impedes meaningful response  ...  that supplied (barely) exceeds, 'Does not Work!'

There aren't error messages.

More details about the problems:

- Sometimes it fails to end the programming.

- When I'm using Tiva TM4C-123Gh6PMI for programming & debugging it's program my project's files and the energia library, When using J-link it's program only my project's files.

Thanks

bar shpilman said:

- Sometimes it fails to end the programming.

How were you able to confirm the failure? You mentioned there are not any error messages. Does the program simply fail to run as expected.

bar shpilman said:

- When I'm using Tiva TM4C-123Gh6PMI for programming & debugging it's program my project's files and the energia library, When using J-link it's program only my project's files.

For the former, what are you using for the connection type? I am still having a bit of problems following your issue. Please provide a step-by-step description of your use case so that I can try to reproduce.

How were you able to confirm the failure? You mentioned there are not any error messages. Does the program simply fail to run as expected.

The console window show the next message: 

CORTEX_M4_0: GEL Output: 
Memory Map Initialization Complete

And resume button is off.

For the former, what are you using for the connection type? I am still having a bit of problems following your issue. Please provide a step-by-step description of your use case so that I can try to reproduce

Jtag connection of EK-TM4C1294XL.

I'm using the external debug connection, (disconnected to internal MCU and connected to custom board )

bar shpilman said:

The console window show the next message: 

CORTEX_M4_0: GEL Output: 
Memory Map Initialization Complete

That is not an error. In fact, that is a good message (it means the debugger was able to start up and successfully initialize the debugger memory map

bar shpilman said:

And resume button is off.

There are many reasons why this could be the case. It could be that the correct debug context is not selected. Again, it is hard to give good suggestions without more details. Provide a screenshot the whole CCS IDE GUI when this happens

bar shpilman said:

Jtag connection of EK-TM4C1294XL.

I'm using the external debug connection, (disconnected to internal MCU and connected to custom board )

Ok. What is the external JTAG debug probe being used? Some XDS class probe?

From the (very) 'Back of our firm's Back-Room office - behind yet another Back-Room' ... Young staffer vigorously, Waves her hand ... "I know - I know!"

She claims 'J-Link' - which appears (for sure) on Thread's Subject Line -  yet (now) well-suppressed as the thread  'grows & grows.'

That is not an error. In fact, that is a good message (it means the debugger was able to start up and successfully initialize the debugger memory map

I know that is not an error but this is the reason why I couldn't explain the problem - there isn't an error message and yet it's not run as expected.

There are many reasons why this could be the case. It could be that the correct debug context is not selected. Again, it is hard to give good suggestions without more details. Provide a screenshot the whole CCS IDE GUI when this happens

Ok. What is the external JTAG debug probe being used? Some XDS class probe?

I'm using the evaluation kit as debugger to an external target according the next configuration:

- Jumpers to bridge from ICDI to Target portion of LaunchPad were removed 

- PC connected to debug USB port

- JTAG_ARM_10PIN connected to an external target

- At CCS: project -> properties -> CCS general -> Connection: Stellaris In-Circuit Debug Interface

At this case I succeses to program and debug my project, when I'm switch the evaluation kit with J-link (and choose SEGGER J-link Emulator in connection field) it's stuck  as showen in the screenshot above.

Thanks for the screenshot. I can see that the proper debug context is not selected in the Debug view. If you select the node below the current context (the one that starts with "SEGGER J-Link Emulator"), then the button to suspend the processor will be available (since the CPU is already running). Once the CPU is halted, the resume button will be available.

The question now is if the program is running successfully. It seems unlikely since you mentioned there is an issue with J-Link. If you have a 'main' in your program, but you are unable to reach it, then you will see similar behavior since the program will just run forever.

Assuming that the above is the case, the next question is why doesn't the program reach 'main'? If you are loading the same out file between the debug session using the Stellaris ICDI connection and the J-Link connection, then the out file must be fine. Perhaps the J-Link target configuration is missing an initialization step? Check to see what startup GEL file is being used by the J-Link configuration. It may be different than the one used by the ICDI configuration. If they are different, check to see what the differences in the GEL files are. 

ki

Thanks, I selected the right node and now I can see that the program enters an infinite loop (see screenshot below).

I checked the GEL files but the J-link and ICDI configuration used the same files.

Do you have another idea? 

I am unable to reproduce the issue so far. I can run successfully run applications on my EK-TM4C1294XL using both the ICDI and J-Link. Based on your descriptions, it sounds like the application runs with ICDI but not J-Link. Can you provide the *.out file that you are trying to run?

Unable to upload *.out file. Do I have another way to send it?

bar shpilman said:

Unable to upload *.out file. Do I have another way to send it?

Attached zip file4278.AMP_CONTROL_V1.0.zip

Ki said:

...program did not reach main but instead was at fault_ISR (when halting the processor) when using J-Link.

It is wondered if this vendor's, 'Guide to Fault Diagnostics' proves applicable to such, 'Code Faults PRIOR to reaching main?'    Would it not, 'prove of interest' to discover - where & how - the program was faulting?

As users of IAR & (both) 'J-Link & J-Trace' - we find it best to, 'Not attach the J-Link to an 'already powered' MCU board!    While we've (Never) noted, 'Entry to Fault_ISR' as described - it (might) prove advisable to, 'Attach the J-Link (only) while the MCU board is unpowered.'

In addition - our board designs 'ALWAYS' employ:

• external pull-up resistors (far lower in value - thus more effective - than MCU's internal Rs)
• external low value series resistors (buffering) the JTAG lines.   (however for the past 10 years - we've - always/only employed 'SWD' - thus harvesting those 2 GPIO  (normally, 'LOST to JTAG!')

Hello bar,

Just checking to see if you are still seeing the issue, and if the recommendations from cb1_mobile and also the CPU reset helped.

Thanks

ki

Hello Ki,

I didn't get the chance to check it until today.

So far, the CPU reset helped.

Hopefully, it will solve the problem.

Thanks for your help.

Bar.