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TMS570LC4357: ADC power-up delay

Henry Spencer
Prodigy 60 points
Part Number: TMS570LC4357

The LC43x Technical Reference Manual, section 22.2.6.3.2, says to consult the datasheet for the value of t_d(PU-ADV) -- I suspect this is a typo for t_d(PU-ADC) -- the delay required between ADC powerup and the state of a conversion.  Unless it's really well hidden somewhere :-), the current TMS570LC4357 datasheet (rev C) gives no value for this, and in fact is completely silent on the matter.

  • 0
    TI__Mastermind 49120 points

    The min value for this specification is 1us. This should not be an issue for your application unless you enter a low-power-mode wherein you disable the ADC and use it after wake-up. The ADC is enabled on power-up and should provide enough time for it to power up before the application starts an A-D conversion.

    I will submit a documentation feedback for this.

    Regards, Sunil

  • 0 in reply to Sunil Oak
    Prodigy 60 points

    Yes, with a delay that short it's definitely relevant only if the ADC is being powered down -- I noticed that existing code examples don't make any attempt to delay.  But one can't use IDLE_PWRDN mode (aka "enhanced power-down mode") in particular without knowing what delay to set in the ADPWRUPDLYCTRL register.

  • 0 in reply to Henry Spencer
    TI__Mastermind 49120 points

    Agreed. This parameter was missed from the datasheet, and I have submitted an update request. The 1us min value can be configured based on the VCLK frequency when the ADC is enabled on wake-up.