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TMS570LS3137: Clarification on Flash ECC and speculative CPU fetches

Part Number: TMS570LS3137

Hello,

I would like to ask you for clarification and providing more information about Flash ECC diagnostics and speculative CPU fetches to uninitialized Flash memory which trigger Double Error event (FEDAC status register - bit B1_UNC_ERR, faulty address stored in register FUNC_ERR_ADD).

I know that on the TI forum, there is several threads related to this topics. The solution is a) to initialize entire Flash memory space and let flash programmer to automatically calculate ECC values or b) to let linker to generate ECC values explicitly, store them into special linker-generated section, and flash data together with ECC. 

Per TI TMS570 Tech Ref Manual:

  • The ECC values for all of the ATCM program memory space (Flash banks 0 through 6) must be programmed into the Flash." The related area is up to 0x7FFFF. As this is part of SMC2 Image flash, it should be programmed.
  • "A speculative fetch to a location with invalid ECC, which is subsequently not used, will not create an abort, but will set the ESM flags for a correctable or uncorrectable error. An uncorrectable error will unconditionally cause the nERROR pin to toggle low. Therefore care must be taken to generate the correct ECC for the entire ATCM space including the holes between sections and any unused or blank Flash areas."

Regarding speculative fetches, according to what I found in ARM Cortex R4F Tech Ref Manual and here on the forum, they may be performed on both, instructions and data. 

In our case, Double Error events occurred during program execution on addresses from the start or middle flash sectors - 0xa0000, 0xc0000, 0xf0000, ..., 0x100000, 0x110000, ....up to 0x2d0000, 0x2e0000, 0x2f0000. Looking at the observed addresses, they are all aligned to 64KB. (Note that the Flash consists of the first four sectors with 32KB followed by 128KB sectors up to 0x2FFFFF).

Our SW utilizes the initial half of the Flash (up to 0x190000). I would expect that speculative execution generates addresses near to "known" program or data flash blocks, but not from the end of the flash. Could you explain what we have observed? (How is possible that CPU tries to access given addresses?).

Thank you.