TMS570LS3137: SRAM ECC Abort - Permission fault

Hello,

Can you read back the ECC_WR_EN bit from RAMCTRL ( RAMCTRL can be written in privileg mode only ).

Hello,

Yes, I am already setting RAMCTRL  to 0x0005010AU (ECC_WR_EN  is enabled)  in my code and verified that these values are updated in CCS register window. So, I assume write access permission is already enabled for RAM ECC location. But, I have no idea why the CPU gets aborted.

My application is running in system mode and I believe system mode is one of the privilege mode. Correct me if I am wrong.

Please check if you have set ECC_WR_EN for both sets of BxTCM RAMCTRL registers.

Hi Sunil,

Yes, ECC_WR_EN  is enabled for both sets. Kindly find the screenshot of RAM registers and Data Fault status register below,

RAM Registers:

DFSR:

How about the MPU? Does the RAM ECC memory location that you are writing to fall within an MPU region that allows you to write to it?

I am not using Halcogen to generate MPU configuration.

Since I am working in AUTOSAR application, my configuration tool does not support MPU configuration.

Is there any register which I can check to confirm the MPU configuration?

You can also see the MPU configuration using the debugger. These config registers are banked registers so they only reflect the configuration for the selected region number. You would need to manually cycle through the available number of regions to see their respective configurations.

You can download this gel file: 

It includes easy-to-use gel commands to read out the MPU configuration. Note that this is applicable for the TMS570LC43x and RM57x Cortex-R5F based parts. You can change the variable indicating number of MPU regions available in the gel file and use it to read out the MPU configuration on TMS570LS3137 as well.

Hi,

I have tried loading the gel file and had run it. I am getting the following error message,

Do I have to define CP15_MPU_REGION_NUMBER, CP15_MPU_REGION_SIZE_ENABLE, CP15_MPU_REGION_BASE_ADDRESS and CP15_MPU_REGION_ACCESS ?

I have no experience in working with gel files. Please guide me.

Hi,

I have tried loading the gel file and had run it. I am getting the following error message,

Do I have to define CP15_MPU_REGION_NUMBER, CP15_MPU_REGION_SIZE_ENABLE, CP15_MPU_REGION_BASE_ADDRESS and CP15_MPU_REGION_ACCESS ?

I have no experience in working with gel files. Please guide me.

The CPU does need to be in a privileged mode (any mode other than "User" mode) in order to query the MPU configuration registers.

Also, you only need to setup the correct number of MPU regions supported on the part you are using. On TMS570LS3137, 12 MPU regions are supported.

Regards, Sunil

Yes, I am setting R5F_MAX_MPU_REGIONS to 12.

I am running the hotmenu R5F_MPU_settings in system mode. But still I am getting the same error.

Below variables are not declared in the gel file, where does the definition for these variables comes from? This might be a silly question, but as I said I dont have an idea about gel files and how it gets executed,

CP15_MPU_REGION_SIZE_ENABLE

CP15_MPU_REGION_BASE_ADDRESS

CP15_MPU_REGION_ACCESS

Hi Sunil,

Could you please clarify the query on .gel files above?

Hi Sunil,

TMS570LS3137 gel file is already loaded. Even then I am getting the error. Am I missing something here?

Hi Sunil,

I paused the program execution and ran the gel script. Now, it is working.

I have checked the MPU configuration for RAM ECC region. It is configured for USER READ and USER WRITE access. But still, when I try to flip a single bit in RAM ECC, CPU gets aborted.

DFSR value is 0x80D - Write access permission caused an abort.

Could you please let me know the reason for this?

Hi Laxmikanth,

You need to upload the entire code sequence, including the enable of writing to ECC RAM and then the actual writes to the ECC RAM and then the read from the affected RAM locations.

Hi Sunil,

Please find my code below ,

volatile uint64 ramread = 0U;

/* Enable writes to ECC RAM, enable ECC error response */
tcram1REG->RAMCTRL = 0x0005010AU;
tcram2REG->RAMCTRL = 0x0005010AU;


/* Force a single bit error in both the banks */
_coreDisableRamEcc_();
tcramA1bitError ^= 1U;
tcramB1bitError ^= 1U;
_coreEnableRamEcc_();

/*Read the corrupted data to generate single bit error*/
ramread = tcramA1bit;
ramread = tcramB1bit;

/* disable writes to ECC RAM */
tcram1REG->RAMCTRL = 0x0005000AU;
tcram2REG->RAMCTRL = 0x0005000AU;

Below is my startup code where I am configuring RAM error threshold and enabling RAM ECC

// Initialize memory
memoryInit(0x1U);

// Clear RAMOCUUR before setting RAMTHRESHOLD register
tcram1REG->RAMOCCUR = 0U;
tcram2REG->RAMOCCUR = 0U;


// Set Single-bit Error Threshold Count as 1
tcram1REG->RAMTHRESHOLD = 0x05U;
tcram2REG->RAMTHRESHOLD = 0x05U;

// Enable single bit error generation
tcram1REG->RAMINTCTRL = 0x01U;
tcram2REG->RAMINTCTRL = 0x01U;

// Enable SRAM ECC
_coreEnableRamEcc_();

Laxmikanth,

Do you have a complete CCS code project that I can run as-is? I do not see the issue that you are observing for writing to the ECC RAM location. Is the CPU in privileged mode when it is writing to the RAM interface module control registers?

Hi Laxmikanth,

Do you have an update on this issue?

Hi Sunil,

We are updating our MPU configuration. I will come back to you next week after validating it.

Hello Sunil,

Thanks for your inputs!

We have updated MPU configuration and provided privileged read and write access for RAM ECC region. Now, SRAM ECC check is working.

I have a doubt here, we have done MPU configuration for RAM ECC to inject SRAM ECC error and to verify the fault reaction. But, is it recommended to enable privilege access for RAM ECC region in the production software? 

Hi Sunil,

I am not asking about accessing RAM control registers.

I want to understand the impact of giving privileged mode access to RAM-ECC locations in the production software.

Thanks!

I am a beginner in this topic. Please bear with me for the stupid questions.

In our MPU configuration, we have defined read and write access to RAM-ECC locations in privileged mode.

If my understanding is correct, read access should not be defined for RAM-ECC location in privileged mode. Only write access is recommended. Please correct me.

Ok. Understood!.

Thanks for your support Sunil!