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TMS570LC4357: meanings of specific safety features

Part Number: TMS570LC4357

Hi Team,

Just want to check with you whether the code will keep working ( interrupt and mission are both normal) , IO function can work normally  if below issue happens

PMW1, SYS4,MEM9,MEM10,MEM12. 

Thanks.

BRs

Given

  • Hi Given,

    I don't see PMW1 in the safety manual. Please correct the typo and let me know. I am addressing the other functions below.

    SYS4:

    This is a mechanism that is implemented for some critical control register fields. These fields appear as a single bit to the user, but are internally implemented as multi-bit fields with a SECDED (Single-bit Error Correct, Double-bit Error Detect) capability. A double-bit error indicated by this mechanism does not affect any other functions and is indicated as an ESM group1 error. The application can choose to address this error as required.

    MEM9:

    This mechanism reports an error in an interconnect transaction to the ESM group 1. The application can choose to address this error as required.

    MEM10:

    This mechanism reports a timeout error on any transaction in the interconnect to the ESM group 1. The application can choose to address this error as required.

    MEM12:

    This is a critical error and is reported to the ESM as a group 3 error. The external safety monitor is expected to put the system in a safe state when this error is signaled.

  • Hi Sunil,

    Thanks for your reply.

    Sorry for the typo, it's PMM1. Thanks.

    BRs

    Given

  • PMM1 is an error generated by the lockstep controllers implemented for each control signal for the power domain switches. Any mismatch in the control signals is mapped to an ESM group 1 error. The application can choose to address this error as required.

  • Hi Sunil,

    Thankr for your reply.

    One more question,based on datasheet,it seems the ESM error of MEM12 is group1 53,but you mentioned it is group3,so just want to confirm with you on which the MEM12 error is. Thanks.

    BRs

    Given

  • Parity error on address / control lines is indicated as a group 3 error.

  • Hi Sunil,

    Thanks for your reply.

    Still want to check on which specific error it is. Is it 3.15 or other error ? Thanks.

    BRs

    Given

  • Hi Given,

    It is clearly stated in the datasheet. There are two separate errors depending on which memory is being accessed: L2 Flash or L2 RAM.

    3.15 is for address/control parity error on access to L2 SRAM

    3.13 is for address/control parity error on access to L2 Flash.

  • Given,

    MEM12 refers to the CPU interconnect checking parity for CPU's address and control lines. It is not related to ESM group 3 channels 13 and 15.

    ESM 3.13 and 3.15 are generated by the L2 SRAM and L2 Flash modules when they detect a parity error in the address/control lines driven to these modules by any bus master.

    Regards, Sunil