CCS/TMS570LC4357-EP: TMS570LC4357-EP STC Test problem

Heather Linn

Prodigy 130 points

Part Number: TMS570LC4357-EP
Other Parts Discussed in Thread: TMS570LC4357, HALCOGEN

Tool/software: Code Composer Studio

About the STC2 test for n2HET module, the STC2 test is not running after enabling the test.

over 5 years ago

0 Miro over 5 years ago

TI__Mastermind 21425 points

Hello,

Would you give us more information. What makes you think STC2 test is not working? Does the test fails?

0 Heather Linn over 5 years ago in reply to Miro

Prodigy 130 points

After enabling the STC test by programming the STCGCR1 register with 0xA, the STCGSTAT register value becomes 0x00000501 which means the test has been completed, but actually the test has not been triggered yet. And after i have measured the test time, the test time come out to be around 10usec. The actual test time should be in hundreds of usec.STC2 Test not running .docx

0 Sunil Oak over 5 years ago in reply to Heather Linn

TI__Mastermind 49120 points

Hi Heather,

TMS570 parts have an erratum that requires a workaround before any PBIST or LBIST (STC) can be executed correctly. This is described in the TMS570LC4357 errata document ()

Refer to issue number PBIST#4 and STC#30. Please ensure that you execute the errata_PBIST_4() function generated by HALCoGen during the start-up sequence before executing any PBIST or LBIST for target memories / processors.

Regards, Sunil

0 Heather Linn over 5 years ago in reply to Sunil Oak

Prodigy 130 points

I have execute the errata_PBIST_4() function at start-up. and I have supposed to run the STC2 at start of the application program as follows:

GPIO_Config(hetPORT1,0,OUTPUT,OPENDRAIN,PULLUP,LOW);        // To check the STC timing
    GPIO_SetPin(hetPORT1, 0, 1);
    retVal2 = SL_SelfTest_STC2();
    if( FALSE == retVal2) {
        for(;;);
    }
    GPIO_SetPin(hetPORT1, 0, 0);

And the STC2 test time only takes about 10 usec. The test time is supposed to be 100s of usec.

Regards,

Linn

0 Sunil Oak over 5 years ago in reply to Heather Linn

TI__Mastermind 49120 points

Thanks for the confirmation. I will run the test on my setup tomorrow and let you know. Do you also program the STCCLKDIV field in the STC registers? STC for the HET modules is to be run at a max of fVCLK2 / 2 frequency.

Regards, Sunil

0 Sunil Oak over 5 years ago in reply to Sunil Oak

TI__Mastermind 49120 points

Hi Linn,

I ran the test on my setup here, and measure ~333us (using a pin toggle marker) for the STC on the two HET modules (executing in parallel). See my main code below. You can get a better time measurement using the Performance Monitoring Unit (PMU) within the CPU, just as a side note.

int main(void)
{
/* USER CODE BEGIN (3) */

    errata_PBIST_4();                                   // workaround to allow ROM reads to work

    gioInit();

    stcREG2->STCGCR0 = (9U << 16u) | (1u << 0u);        // 9 intervals, restart from interval 0

    stcREG2->STCSCSCR = 0u;                             // no fault injection

    stcREG2->STCTPR = 0xFFFFFFFFu;                      // max timeout period

    stcREG2->STCCLKDIV = (1u << 24u) | (1u << 16u);     // both STC clock dividers set to div-by-2

    stcREG2->STCFSTAT = 0xFu;                           // clear self-test fail status flags
    stcREG2->STCGSTAT = 0x3u;                           // clear global status flags

    gioSetBit(gioPORTA, 0, 1);                          // drive GIOA0 High to mark start of STC2

    stcREG2->STCGCR1 = (0u << 8u) | (0xAu << 0u);       // enable self-test on both HET modules

    while (!(stcREG2->STCGSTAT & 0x1));                 // wait until TEST_DONE is set

    gioSetBit(gioPORTA, 0, 0);                          // drive GIOA0 Low to mark end of STC2

    while(1);


/* USER CODE END */

    return 0;
}

0 Heather Linn over 5 years ago in reply to Sunil Oak

Prodigy 130 points

Hi Sunil,

The STC test time is still at about 10 usec. Still can't get the correct timing. Please refer to the following application program. I only execute STC2 in the application program.

int main(void)
{
/* USER CODE BEGIN (3) */
#if 0
uint32 pmuCalibration, pmuCount;

    /* PMU calibration */
   _pmuInit_();
   _pmuEnableCountersGlobal_();
   _pmuResetCounters_();
   _pmuStartCounters_(pmuCYCLE_COUNTER);
   _pmuStopCounters_(pmuCYCLE_COUNTER);
   pmuCalibration=_pmuGetCycleCount_();
#endif
    //GPIO_Config(hetPORT1,0,OUTPUT,OPENDRAIN,PULLUP,LOW);

errata_PBIST_4();

//gioInit();
GPIO_Config(hetPORT1,0,OUTPUT,OPENDRAIN,PULLUP,LOW);

sl_stcREG2->STCGCR0 = (9U << 16u) | (1u << 0u); // 9 intervals, restart from interval 0

sl_stcREG2->STCSCSCR = 0u; // no fault injection

sl_stcREG2->STCTPR = 0xFFFFFFFFu; // max timeout period

sl_stcREG2->STCCLKDIV = (1u << 24u) | (1u << 16u); // both STC clock dividers set to div-by-2

sl_stcREG2->STCFSTAT = 0xFu; // clear self-test fail status flags
sl_stcREG2->STCGSTAT = 0x3u; // clear global status flags

gioSetBit(hetPORT1, 0, 1); // drive GIOA0 High to mark start of STC2

    /* Start PMU counter */
   //_pmuResetCounters_();
   //_pmuStartCounters_(pmuCYCLE_COUNTER);

sl_stcREG2->STCGCR1 = (0u << 8u) | (0xAu << 0u); // enable self-test on both HET modules

while (!(sl_stcREG2->STCGSTAT & 0x1)); // wait until TEST_DONE is set

    /* Stop PMU counter */
    //_pmuStopCounters_(pmuCYCLE_COUNTER);
//
    /* Get CPU cycle count */
    //pmuCount =_pmuGetCycleCount_();
    //pmuCount = pmuCount - pmuCalibration;

gioSetBit(hetPORT1, 0, 0);

while (1);

    //GPIO_SetPin(hetPORT1, 0, 1);
   // if( TRUE == STC2_SelfTest())
   // {
   //     for(;;); // Fail, selftest should return FALSE
   // };
    //if( FALSE == STC2_Test())
    //{
    //    for(;;); // Fail, the real test should return TRUE
    //};

//GPIO_SetPin(hetPORT1, 0, 0);
/* USER CODE END */

}

0 Sunil Oak over 5 years ago in reply to Heather Linn

TI__Mastermind 49120 points

Hi Linn,

At this point I would have to ask you to upload a zipped file of your entire code project that I can just directly run on my setup to observe / debug the issue.

Regards, Sunil

0 Heather Linn over 5 years ago in reply to Sunil Oak

Prodigy 130 points

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/312/5488.TMS570LC43xxSTC2.7z

0 Sunil Oak over 5 years ago in reply to Heather Linn

TI__Mastermind 49120 points

Linn,

I see the issue now. Should have realized this sooner, sorry.

Please use an output pin other than an HET pin for signaling the start and end of STC on the HET modules. The STC also tests (and disrupts) the I/O logic inside the HET modules.

I tested your code using GIOA_0 as the marker and it shows the correct time.

Regards, Sunil

Arm-based microcontrollers

Arm-based microcontrollers forum

CCS/TMS570LC4357-EP: TMS570LC4357-EP STC Test problem