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Original question:

TM4C1294NCPDT: Unused Pins of TIVA

TM4C1294NCPDT: PCB Stack up suggestion

HARANATH VASAM1
Intellectual 300 points

Part Number: TM4C1294NCPDT

In the PCB guidelines document SPMA056, 3.3 General Layout Design Choices, stack up suggested is of 6 layers with 1-oz Copper in signal and power layers.

Our board is having high current relays, so we are planning to make signal and power layers with 2-oz Copper.

1) Is it ok to go with Signal and power layers with 2-oz Copper technically?

2) If ok..Request you to suggest suitable stack with 2-oz Copper.

Thanks

HARANATH

  • 0
    TI__Guru**** 191886 points

    Hi Haranath,

      We are not PCB experts. Our expertise is mainly on the MCU operations.  In most cases, 1-oz copper is constructed for the PCB. I can understand with high current, you might want to go with 2-oz or higher. However, I can't recommend anything other than what is recommended in the System Design Guideline that you have already seen.  I found this web site that I think might help you on determining the copper thickness. In this website there is a link to a calculator that you can play with to some ideas. Perhaps there are some other on-line sties that can provide recommendations too. Hopefully, some community experts visiting this thread will chime in with recommendations. 

    https://www.pcbuniverse.com/pcbu-tech-tips.php?a=4

  • 0
    Guru 117855 points

    Hello,

    Our small tech firm produces, 'Motor-based Power Stages' - which often exceed 1KW in power delivery.    Indeed - thicker copper (usually) IS required.

    You may consider:

    • High-Current Relays (usually) demand high-current coils.     And - those coils - 'Play NO Part in power delivery!'    Have you considered the use of (far more efficient) Power FETs?     These FETs switch faster & are likely to generate less RFI/EMF.    (and save board space while (often) reducing cost)
    • Several of our boards employ 4-oz copper layers - note that these layers should be 'external' - so that they may be properly 'cooled.'
    • All high current pcb traces should be as 'wide as possible' - direct (& short) and as 'via reduced' as possible.
    • Vital signal traces should avoid coming near high-current ones and/or traces carrying high-speed signals.
    • Mount pcb components which are expected to 'heat' FAR from the MCU & other critical circuit elements.
    • Cost Savings may result from your mounting the Power Relays (or Power FETs) upon a (smaller) separate board - which (substantially) solves your 'pcb stack' issue.
    • You'd do well to, 'Provide for Active (forced) Cooling' - this may not be needed - yet far easier to 'Not Fill w/components' - than to have to 'jury rig/kludge' under rush & pressure.    (Not to ask, 'How I know?')

    While vendor's System Design Guide provides value - my group (and our key clients) have learned that 'PCB's (successfully) carrying high currents' (rarely) emerge from less than 2 Revisions - and those implemented by a 'Real PCB Artist'  (long having 'mastered' this unique, 'Art & Science') - prove clearly superior...