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TMS570LC4357: MIBSPI Multiple SIMO/SOMI Pins

James Kiessling
Intellectual 380 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hello,

I have read through the device Technical Reference Manual, but I am still unsure about one aspect of the MIBSPI peripheral - why do MIBSPI1 and MIBSPI5 have multiple SOMI/SIMO pins? Specifically, MIBSPI1 has SOMI/SIMO[1..0] and MIBSPI5 has SOMI/SIMO[3..0]. 

Can the multiple data lines be used to simultaneously communicate with multiple slave devices? If so, how would one go about setting this up? Our project uses HALCoGen, but I don't see any settings to bind a specific SOMI/SIMO pin to a transfer group.

Regards,

James

  • 0
    TI__Guru**** 196176 points

    Hello James,

    1. To increase the throughput, multiple data lines can be used in parallel (please refer to TRM 27.2.6.6 Parallel Mode). Parallel mode can be programmed using the PMODEx[1:0] bits of SPIPMCTRL register

    2. No, if parallel mode is disabled (by default), the 2nd/3rd/4th data line are not used for SPI data communication.