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TMS570LC4357: Does the TMS570LC4357 support the nCPUHALTm signal

Ulf Samuelsson
Expert 1010 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: SEGGER

The Cortex-R5 core has an input signal "nCPUHALTm"..

This is described in

"http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/BEIBGHGC.html"

If the signal is asserted, then the CPU will not execute any instructions after reset.

  • Is this signal accessible to JTAG probes?
  • Is this documented somewhere?
  • Is this used in the XDS200 driver?

We have IAR I-Jet, Segger J-Link and XDS200 and have seen problems that the CPU
seems to execute code between the reset, and when the CPU is stopped when
we press reset in the IAR GUI.

Best Regards

Ulf Samuelsson

  • 0
    TI__Mastermind 49120 points

    Hello,

    Excuse us for the delay in answering. TI Code Composer Studio does support a "Break on Reset" feature for Cortex R4/5 processors. However, I am not sure about the implementation details for this. Hence I am not able to answer whether this feature uses the nCPUHALT input to the CPU or not.

    I am waiting on input from the design team to confirm this and will provide an update as soon as I hear back.

    Regards, Sunil

  • 0 in reply to Sunil Oak
    TI__Mastermind 49120 points

    This signal is tied to '1' so that this mechanism is not available for tools to use.