TMS570LS1227: HET1 Edge interrupt problem.

JUNG SU KIM

Part Number: TMS570LS1227
Other Parts Discussed in Thread: HALCOGEN

Hello.
When input signal received from external chip is rising edge, I am working on a program that interrupts and reads EMIF data.

Through Halcogen, we set up the contents of Edge 0-7, Edge interrupt, pinmux, VIM channel tap of pin 17 of HET1.
EMIF uses Async3 and configured as below.

The problem is that when i take a waveform, it works when the falling edge is over. Is there something wrong with my setup? If anyone knows, can you answer me?
Have a nice day.

over 5 years ago

0 QJ Wang over 5 years ago

TI__Guru**** 196346 points

Hello Jung Su,

Is EMIF reading operation located in HET1 edge interrupt routine? You can add a breakpoint in HET1 edge ISR to check if the ISR is triggered by the rising edge of the N2HET1[17].

0 JUNG SU KIM over 5 years ago in reply to QJ Wang

Prodigy 30 points

Hello, QJ Wang

Sorry. Reply is late.VIM 10 (HET high) interrupt is enabled. I checked using break.

In the waveform below, the chip signal remains high after the rising edge. And when data is read by EMIF, the signal falls back low.

EMIF nOE signal goes active low. There is a delay of about 3us. Can I reduce the delay by setting?

[C1: chip signal, C2 : EMIF_nOE]

0 QJ Wang over 5 years ago in reply to JUNG SU KIM

TI__Guru**** 196346 points

Hello,

Are the EMIF operations in NHET edge ISR ( edgeNotification() )?

void edgeNotification(hetBASE_t * hetREG,uint32 edge)
{

if (edge == 0) { //pin 17 edge in your seeting

EMIF operation;

}

0 QJ Wang over 5 years ago in reply to QJ Wang

TI__Guru**** 196346 points

Hello Jung Su,

Have you solved the program?

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TMS570LS1227: HET1 Edge interrupt problem.