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TMS570LS3137-EP: Testing Resets, Aborts, Errors

Part Number: TMS570LS3137-EP
Other Parts Discussed in Thread: HALCOGEN,

Hello,

I am wondering if there is a way I can test most, if not all, the Reset/Abort/Error conditions per SPNS230D (TMS570LS3137-EP Microcontroller datasheet section 6.19) to validate each scenario. I see Halcogen generates many of the parity error tests so I am not concerned about those. My concern is with the other errors which are more difficult (for me) to test.

  • Precise Write/Read errors
  • Imprecise Write Error
  • Illegal Instruction
  • FMC Uncorrectable Error - Accesses to EEPROM
  • DMM External Imprecise error on read (Illegal transaction with ok response)
  • NCNB transaction
  • PLL Slip
  • Clock Monitor Interrupt
  • DCC1 Error
  • Self Test Failure
  • Compare Failure
  • PSCON Compare Error

Any guidance on how I can trigger these errors for testing would be greatly appreciated.

Thanks,

David Cothran

  • Hello David,

    1. Precise/imprecise Write/Read errors: you can write data to an implemented SRAM address or read data from this invalid address. This write/read operation will cause precise W/R error.

    3. Illegal Instruction: you can perform floating operation after FTU is disabled

    4. FMC Uncorrectable Error - Accesses to EEPROM            ------- safety diagnostic library

    5. DMM External Imprecise error on read (Illegal transaction with ok response) -- similar to #1

    6. NCNB transaction      --what does this mean?

    7. PLL Slip             ------- safety diagnostic library

    8. Clock Monitor Interrupt           ------- safety diagnostic library

    9. DCC1 Error            ------- safety diagnostic library

    10. Self Test Failure           ------- safety diagnostic library

    11. Compare Failure           ------- safety diagnostic library

    12. PSCON Compare Error           ------- safety diagnostic library

    Please refer to the Safety Diagnostic Library user guide in C:\ti\Hercules\SafeTI Diagnostic Library\2.4.0\docs

  • QJ Wang,

    Thanks for the swift reply. I'll look into all of this!

    Apologies for being unclear regarding the NCNB transaction. I'm not exactly sure myself exactly what it is saying.

    HET TU2 (HTU2)
    NCNB (Strongly Ordered) transaction with slave error response

    Let me know if this helps clarify and how we may be able to test this.

    Thanks,

    David Cothran