• State Resolved
  • Locked Locked
  • Replies 7 replies
  • Subscribers 30 subscribers
  • Views 685 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LC4357, example spna217.pdf, two sine waves in one HET

Lars Guenther
Intellectual 675 points

Hi all,

I want to generate two different PWMs (sine waves with different amplitude and frequency) but from one HET time Processor on my eval board TMS570LC43x HDK.

So I just used the example spna217.pdf and this is already running.

My idea is to copy the actual HET source Code and use it for a second PWM signal with register B, like this:

PWM_PERIOD            .equ 1
PWM_PIN_NUM4          .equ 4
PWM_PIN_NUM2          .equ 2
INIT_COMPARE          .equ 1
INIT_HR_DELAY         .equ 0


L00   CNT { reqnum=0,request=GENREQ,reg=A,irq=OFF,max=1};
L01   ECMP { next=L03,hr_lr=HIGH,en_pin_action=ON,cond_addr=L02,pin=PWM_PIN_NUM2, action=PULSELO,reg=A,irq=OFF,data=INIT_COMPARE,hr_data=INIT_HR_DELAY};
L02   MOV32 { remote=L01,type=IMTOREG&REM,reg=A,data=INIT_COMPARE,hr_data=INIT_HR_DELAY};


L03   CNT { reqnum=0,request=GENREQ,reg=B,irq=OFF,max=1};
L04   ECMP { next=L06,hr_lr=HIGH,en_pin_action=ON,cond_addr=L05,pin=PWM_PIN_NUM4, action=PULSELO,reg=B,irq=OFF,data=INIT_COMPARE,hr_data=INIT_HR_DELAY};
L05   MOV32 { remote=L04,type=IMTOREG&REM,reg=B,data=INIT_COMPARE,hr_data=INIT_HR_DELAY};

L06   BR { next= L00, cond_addr=L00, event= NOCOND }

so the next step was to set up the HTU like this. I think I can use the register IFADDRB for the second PWM Signal.

void htuInit(void){
    /* DCP0 CPx element count = 1, frame count = SAMPLE_SIZE */
    htuDCP1->ITCOUNT = 0x00010000 + SAMPLE_SIZE;
    /* DCP0 CPx DIR = main memory to NHET */
    /* SIZE = 32-bit */
    /* ADDMH = 16 bytes */
    /* ADDFM = post-increment main memory */
    /* TMBA = circular buffer A */
    /* TMBB = one shot buffer B (buffer B not used) */
    /* IHADDR = 0x28 MOV32 data field */
    htuDCP1->IHADDRCT = (htuDCP1->IHADDRCT & 0x0) |
    0x1 << 23 | // DIR
    0x0 << 22 | // SIZE
    0x0 << 21 | // ADDMH
    0x0 << 20 | // ADDFM
    0x1 << 18 | // TMBA
    0x0 << 16 | // TMBB
    0x28 << 0; // IHADDR
    /* DCP0 CPA start address of source buffer */
    htuDCP1->IFADDRA = (unsigned int)sine_table;
    htuDCP1->IFADDRB = (unsigned int)sine_table2;
    /* enable DCP0 CPA */
    htuREG1->CPENA = 0x00000001;
    /* enable HTU */
    htuREG1->GC = 0x00010000;
}

and also my configNHET1 function like this:

void configNHET1(void)
{
    hetREG1->PFR = LRPFC << 8;
    calculate_ecmp_compare();

    hetREG1->REQENS = 1 ;

    hetREG1->DIR |= (1 << PIN_HET_2) ;
    hetREG1->DIR |= (1 << PIN_HET_4) ;

    hetRAM1->Instruction[pHET_L00_0].Control  = (hetRAM1->Instruction[pHET_L00_0].Control & 0xFFFD0000) | (uint32)(CNT_MAX_PERIOD - 1);
    hetRAM1->Instruction[pHET_L03_0].Control  = (hetRAM1->Instruction[pHET_L03_0].Control & 0xFFFD0000) | (uint32)(CNT_MAX_PERIOD - 1);

    hetRAM1->Instruction[pHET_L01_0].Control  = (hetRAM1->Instruction[pHET_L01_0].Control & 0xFFFFE0FF) | (PIN_HET_2 << 8);
    hetRAM1->Instruction[pHET_L04_0].Control  = (hetRAM1->Instruction[pHET_L04_0].Control & 0xFFFFE0FF) | (PIN_HET_4 << 8);
}

The first PWM is running, but I have  problems with the second one. I get a PWM Signal with a fixed duty cycle on the second channel.

Best regards

Lars

 

  • 0
    TI__Guru**** 197386 points

    Hi Lars,

    I will take a look at your question later, and come back to you as soon as I can. 

  • 0 in reply to QJ Wang
    TI__Guru**** 197386 points

    Hi Lars,

    Please use DCP[0] for teh 1st PWM, and use DCP[1] for the 2nd PWM.

    htuRAM1 ->DCP[0].IFADDRA = (unsigned int)sine_table2;

  • 0 in reply to QJ Wang
    Intellectual 675 points

    Hi all,

    I think that will work, I am sure. But than I used the second HTU.

    But I need the second HTU plus second HET Processor for other thinks, like a triangle signal.

    So what I want is to do is to generate two sine waves with different frequencies and amplitude with one HET and one HTU.

    Best regards

    Lars

  • 0 in reply to Lars Guenther
    TI__Guru**** 197386 points

    Hi Lars,

    I didn't mean to use N2HET2 and HTU2. I mean to use HTU1 control packet 0 (DCP[0]) for sine_table1 and use HTU1 control packet 1 (DCP[1]) for sine_table2.

  • 0 in reply to QJ Wang
    Intellectual 675 points

    Hi all,

    I adapt my files HL_reg_htu.h and configHtu.c as followed. Now I hopefully use DCP[0] and DCP[1]. The Register IFADDRA, IHADDRCT, ITCOUNT are now initialized for DCP[0] and DCP[1], I also set the CPENA Register to 0x05u.

    But I got the same result. First PWM is running, the second one is still a PWM Signal with a fixed duty cycle..

    HL_reg_htu.h:

    /* USER CODE BEGIN (1) */

    typedef volatile struct dcp
    {
        htudcp_t dcp[8];
    } dcp_t;

    #define htuRAM1   ((dcp_t *)0xFF4E0000U)
    /* USER CODE END */

    configHtu.c:

    void htuInit(void){
        /* DCP0 CPx element count = 1, frame count = SAMPLE_SIZE */
    //    htuDCP1->ITCOUNT = 0x00010000 + SAMPLE_SIZE;
        htuRAM1->dcp[0].ITCOUNT = 0x00010000 + SAMPLE_SIZE;
        htuRAM1->dcp[1].ITCOUNT = 0x00010000 + SAMPLE_SIZE;
        /* DCP0 CPx DIR = main memory to NHET */
        /* SIZE = 32-bit */
        /* ADDMH = 16 bytes */
        /* ADDFM = post-increment main memory */
        /* TMBA = circular buffer A */
        /* TMBB = one shot buffer B (buffer B not used) */
        /* IHADDR = 0x28 MOV32 data field */
    #if(0)
        htuDCP1->IHADDRCT = (htuDCP1->IHADDRCT & 0x0) |
        0x1 << 23 | // DIR
        0x0 << 22 | // SIZE
        0x0 << 21 | // ADDMH
        0x0 << 20 | // ADDFM
        0x1 << 18 | // TMBA
        0x0 << 16 | // TMBB
        0x28 << 0; // IHADDR
    #else
        htuRAM1->dcp[0].IHADDRCT = (htuRAM1->dcp[0].IHADDRCT & 0x0) |
        0x1 << 23 | // DIR
        0x0 << 22 | // SIZE
        0x0 << 21 | // ADDMH
        0x0 << 20 | // ADDFM
        0x1 << 18 | // TMBA
        0x0 << 16 | // TMBB
        0x28 << 0; // IHADDR

        htuRAM1->dcp[1].IHADDRCT = (htuRAM1->dcp[1].IHADDRCT & 0x0) |
        0x1 << 23 | // DIR
        0x0 << 22 | // SIZE
        0x0 << 21 | // ADDMH
        0x0 << 20 | // ADDFM
        0x1 << 18 | // TMBA
        0x0 << 16 | // TMBB
        0x28 << 0; // IHADDR
    #endif
        /* DCP0 CPA start address of source buffer */
    //    htuDCP1->IFADDRA = (unsigned int)sine_table;
    //    htuDCP1->IFADDRB = (unsigned int)sine_table2;
        htuRAM1->dcp[0].IFADDRA = (unsigned int)sine_table;
        htuRAM1->dcp[1].IFADDRA = (unsigned int)sine_table2;
        /* enable DCP0 CPA */
    //    htuREG1->CPENA = 0x00000001;
        htuREG1->CPENA = 0x00000005;
        /* enable HTU */
        htuREG1->GC = 0x00010000;
    }

    Best regards

    Lars

  • 0 in reply to Lars Guenther
    Intellectual 675 points

    Hi all,

    I also do the following changes:

    old code

    hetREG1->REQENS = 1;

    new code

    hetREG1->REQENS = 2;

    and set reqnum to 1

    L03   CNT { reqnum=1,request=GENREQ,reg=B,irq=OFF,max=1};

    May be it is better if I post the complete project.

    Best regards

    Lars6431.PWM.ZIP

  • 0 in reply to Lars Guenther
    Intellectual 675 points

    Hi all,

    I found my SW bug. The data for the register htuRAM1->dcp[1].IHADDRCT were wrong.

    The second DMA reguest is at Code line 4 in file file sinus.het. So I must set the IHADDR = 0x58.

    Thanks a lot, best regards

    Lars