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TM4C1290NCPDT: Disabling external debugger access using only firmware

Ewoud Coning
Prodigy 30 points

Part Number: TM4C1290NCPDT

To disable external debugger access, BOOTCFG's DBG1 bit must be set to zero and will be committed on the next power-up cycle. (tm4c1290ncpdt.pdf p.651)

Is there a way to trigger this in firmware?

Since a reset with

HWREG(NVIC_APINT) = (NVIC_APINT_VECTKEY | NVIC_APINT_SYSRESETREQ);

won't accomplish this.

  • 0
    TI__Guru**** 191906 points

    Hi,

      The firmware will be as follows. 

    HWREG(FLASH_FMA) = 0x75100000;
    HWREG(FLASH_FMD) = HWREG(FLASH_BOOTCFG) & 0x7FFFFFFC;
    HWREG(FLASH_FMC) = FLASH_FMC_WRKEY | FLASH_FMC_COMT;

    Please also follow the below two posts.

    http://e2e.ti.com/support/microcontrollers/other/f/908/p/457471/1648777?tisearch=e2e-sitesearch&keymatch=DBG1#1648777

    https://e2e.ti.com/support/microcontrollers/other/f/908/p/807063/2987490?tisearch=e2e-sitesearch&keymatch=DBG1#2987490

  • 0 in reply to Charles Tsai
    Guru 117855 points

    Hi Charles,

    Should poster not be advised that if his objective is "MCU Security" - that this "roadblock" is quickly & easily defeated!    (i.e. there are multiple methods for those "skilled/experienced/& equipped" to access the MCU's code.)

    Most such "User designed Security attempts" end w/the user, "Locking himself out!"    Skilled, well-equipped, financed & motivated (others) can 'easily' Have poster's code from (any) similar MCU...   (in no way is this a 'knock' upon this vendor's MCUs - there exist special "Security-Rated" MCUs - these are MUCH HIGHER COST - and (even) they may be defeated!)

    The rollout of Advanced & Early (focused & sought) "MCU-based Product Solutions" - regularly updated/improved - & fairly priced - proves a FAR better (profit protecting/continuing) mechanism...

  • 0 in reply to Charles Tsai
    Prodigy 30 points

    Hi Charles

    I just realized that my question was not clear. I already use the code you posted, but since debugger access is still available until a power-on reset, I want to trigger the power-on reset sequence from firmware instead of doing it by power cycling via external means.

    So what I meant to ask is whether it is possible to trigger a power-on reset in firmware.

  • 0 in reply to Ewoud Coning
    TI__Guru**** 191906 points

    Hi Ewoud,

      I tried it myself. The HWREG(NVIC_APINT) = (NVIC_APINT_VECTKEY | NVIC_APINT_SYSRESETREQ) will generate a software system reset, not a simulated power-on reset. Only the nRST pin reset or Brown-out or Watchdog reset can be further configured via the RESBEHAVCTL register to generate simulated POR. Can you use nRST pin reset? If this is not possible, can you consider using the Watchdog reset as the watchdog reset can be configured to generate a simulated POR. On caution is that you need to add some intelligence into your code such that this watchdog reset is only generated once. Otherwise, your code will reset every time you restart. You can set and store a flag in the EEprom after you disable the DBG1 and then generate the watchdog reset. This WD reset will be a simulated POR and lock the JTAG. Your code will check if the flag that is stored in the EEprom is set or not. If already set, then don't generate WD anymore and continue with your normal code. With all that said, it is still easiest to just power cycle or pull the nRST pin if possible.

      Another word of caution is that the debug interface should not be permanently disabled without providing some mechanism, such as the boot loader, to provide customer-installable updates or bug fixes. Disabling the debug interface is permanent and cannot be reversed.