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RM46L852: Warm reset causes program execution to hang instead of reset.

Part Number: RM46L852
Other Parts Discussed in Thread: HALCOGEN, UNIFLASH

I have read through the post here: https://e2e.ti.com/support/microcontrollers/hercules/f/312/p/343716/2302050#

and i have tried to reset both with 

systemREG1->SYSECR |= 1U << 15

and

rtiREG1->WDKEY = 0x00000000;

I have also used the Warm reset button on the HDK.

All of these methods result in my HDK hanging instead of resetting. We do have a watchdog in this code base, as well as a bootloader. Warm reset works in the bootloader without an issue.

What could be causing this hang?

  • The code gets stuck somewhere. Is the code generated through HALCoGen? Please check ESM status register to find if any error occur.

  • I compiled the application to run from address 0 instead of 0x20000, and the reset works properly. Its only when i have updated the applications sys_link.cmd file to run at 0x20000 that the reset fails to reset and just hangs. Is there something i need to set in the HAL configuration to make this work? Or some setting that simply wont work in this setup? Do i need to disable anything before triggering the reset?

    Here is what is in the ESM Register:

    Esm	
    	IflErrPinSet1	0x00000000	Influence Error Pin Set/Status Register 1 [Memory Mapped]	
    	IflErrPinClr1	0x00000000	Influence Error Pin Clear/Status Register 1 [Memory Mapped]	
    	IntEnaSet1	0x00000000	Interrupt Enable Set/Status Register 1 [Memory Mapped]	
    	IntEnaClr1	0x00000000	Interrupt Enable Clear/Status Register 1 [Memory Mapped]	
    	IntLvlSet1	0x00000000	Interrupt Level Set/Status Register 1 [Memory Mapped]	
    	IntLvlClr1	0x00000000	Interrupt Level Clear/Status Register 1 [Memory Mapped]	
    	Stat1	0x00011000	Status Register 1 [Memory Mapped]	
    	Stat2	0x00000000	Status Register 2 [Memory Mapped]	
    	Stat3	0x00000000	Status Register 3 [Memory Mapped]	
    	ErrPinStat	0x00000001	Error Pin Status Register [Memory Mapped]	
    	IntOffstHgh	0x00000000	Interrupt Offset High Register [Memory Mapped]	
    	IntOffstLow	0x00000000	Interrupt Offset Low Register [Memory Mapped]	
    	LtCnt	0x00003FFF	Low-Time Counter Register [Memory Mapped]	
    	LtCntPre	0x00003FFF	Low-Time Counter Preload Register [Memory Mapped]	
    	ErrKey	0x00000000	Error Key Register [Memory Mapped]	
    	ShdwStat2	0x00000000	Status Shadow Register [Memory Mapped]	
    	IflErrPinSet4	0x00000000	Influence Error Pin Set/Status Register 4 [Memory Mapped]	
    	IflErrPinClr4	0x00000000	Influence Error Pin Clear/Status Register 4 [Memory Mapped]	
    	IntEnaSet4	0x00000000	Interrupt Enable Set/Status Register 4 [Memory Mapped]	
    	IntEnaClr4	0x00000000	Interrupt Enable Clear/Status Register 4 [Memory Mapped]	
    	IntLvlSet4	0x00000000	Interrupt Level Set/Status Register 4 [Memory Mapped]	
    	IntLvlClr4	0x00000000	Interrupt Level Clear/Status Register 4 [Memory Mapped]	
    	Stat4	0x00000400	Status Register 4 [Memory Mapped]	

  • Hello,

    From the value in ESMSR4 registers (0x00000400), you got an error of PLL2 Slip. You load your code to 0x20000. What is the value at flash 0x00000000 (reset vector)?

    The ARM Cortex-R4F processor core starts execution from the reset vector address of 0x00000000 whenever the core gets reset.

  • The bootloader is at 0x00000000, the values there are below. This is the first two lines of the UniFlash Memory read screen. Keep in mind a hardware reset, and starting from power off both work, its only the warm reset that is having an issue. I did make sure that the logic power domain 2 is on just in case my processor has that issue, but that does not seem to be the case.

    EA004C37	EA007FFE	EA007FFE	EA007FFE	EA007FFE	EAFFFFFE	E51FF1B0	E51FF1B0
    E3A00000	E12FFF1E	E59FC038	E30F0FFF	E58C0034	E3A00000	E58C02C0	E58C02C4

  • The PLL Slip was the clue I needed, the SetupPLL method in the bootloader does not clear the error, but the one in the Application does. Which is why the application could reset when loaded by itself. Adding the PLL recovery logic to the bootloader fixed the issue.