TMS570LS3137: I2C Master read issue

Andy Worsley89

Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN

I found the HalCoGen example code and I copied and pasted this code into my build for the TMS570. It should clock out 3 bytes with the write bit set, then clock back 2 bytes with the read bit set. However what I get is the write works ok, but the read sends the address and nothing else. See the logic analyser screenshot.

Basically the question is what initiates the clocking back of data from the slave device?

over 5 years ago

0 QJ Wang over 5 years ago

TI__Guru**** 197036 points

Hello,

Are the slave address, command for write/write correct? What is the I2C slave?

0 Andy Worsley89 over 5 years ago in reply to QJ Wang

Intellectual 670 points

As you can see from the Logic analyser trace the messages are being ACKd so the address must be correct. Even if they weren't how would that stop the master from clocking the data back, given that the Ignore nack bit is set.

0 QJ Wang over 5 years ago in reply to Andy Worsley89

TI__Guru**** 197036 points

Hello,

To read data from a slave device, you need to transmit SLAVE ADDRESS + W first, WORD ADDRESS, SLAVE ADDRESS + R, the data.

1. Slave address (TX) --- 0x0A

2. Word address

3. Slave address (RX) -- 0x0B

4. Receive data

0 Andy Worsley89 over 5 years ago in reply to QJ Wang

Intellectual 670 points

Surely the slave addresses have to be the same or you'll be addressing different devices.

How does the I2C module know how many bytes to clock back in?

0 QJ Wang over 5 years ago in reply to Andy Worsley89

TI__Guru**** 197036 points

You can read slave immediately after the slave address + R (read mode). If using interrupt mode, RXRDY interrupt is generated when the received data is copied from CSR to DRR register.

The acknowledgement bit is SET (NACK) after the last byte is read.

0 Andy Worsley89 over 5 years ago in reply to QJ Wang

Intellectual 670 points

With respect that doesn't answer the question I asked. How do I control how many bytes are transferred?

The algorithm you described is what I have already implemented (the TI HalCoGen example code) and the result is shown in the logic analyser trace.

0 QJ Wang over 5 years ago in reply to Andy Worsley89

TI__Guru**** 197036 points

Most of I2C slave devices has length for all the registers.

Every byte transmitted over I2C requires acknowledgement. When slave is transmitting data back to master it is the master's responsibility to either allow slave to continue (by replying ACK) or telling it to stop (by replying NACK).

If you implement a I2C slave, you can define your own protocol to include the message length at the first byte.

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TMS570LS3137: I2C Master read issue