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Interrupts with RTOS

Burim Aliu
Intellectual 510 points
Other Parts Discussed in Thread: HALCOGEN

Hi, 

I hope someone could help to explain some points,

According to  the http://e2e.ti.com/support/microcontrollers/tms570/f/312/p/57753/205375.aspx#205375

to  setup the FreeRTOS in TMS570 the  '_svc' should replace  with 'vPortYieldProcessor'.

I have seen in the TMS Safety Demos there is one file "sys_svc.asm" that is used to enable and disable FIQ and IRQ

1. Should be this implemented for the FreeRTOS too?

2. What happens to the interrupts during STC/LBIST tests is Running?

3. I Have used  "xTaskCreate" to create a task and inside it started the STC test for the cores, but it hang-up.. dont now why.  

    Have i missed something that i should take care?

4. How interacts/are linked the ISR with the FreeRTOS isr?

Regards Burim

 

 

  • 0
    TI__Mastermind 22375 points

    Burim,

     

    I've contacted our expert and will post a response as soon as possible.

     

    Best Regards,

     

    Jean-Marc

  • 0
    TI__Intellectual 1470 points

    Burim,

    1)

     FreeRTOS is not used in the safety demos.

    The safety demos use the _svc to turn on and off interrupts.

    FreeRTOS is using it's API to turn on and off interrupts and the svc is used to yield the processor.

    The next version HALCoGen will have support of user defined svc calls beside the yield.

    2)

    The core are decoupled during the STC test (interrupts are not served).

    The STC test is changing the internal status of the CPU, that is why the CPU gets an reset after the test is finished.

    You should make sure that you do not get an OS timer tick during a runtime STC test (including recover timer) otherwise you have got a real time issue.

    After recovery pending interrupts get served.

    3)

    It should not hang-up.

    You should get an CPU reset, but you have to handle it:

    Get reset reason and recover the application instead of running startup sequence.

    4)

    FreeRTOS is using the RTI compare 0 interrupt.

    You can find a few examples which describe this in detail in the HALCoGen help under examples tab.

     

    Cheers

    Marcus

     

     

     

     

     

     

     

     

     

     

  • 0 in reply to Marcus Frech
    Intellectual 510 points

    Hi,

    Thank you Marcus for the fast and detailed answer.

    About the point 2 

    During STC/LBIST run,  interrupts are not served . Is it the same for the PBIST/Tests, i mean if want to execute MARCH13n on SinglePort Memory Types[1] how are interruptes treated?? I understand that  i must backup the content of the chosen RAM because after the test it is lost

    And the Last question:

    After the STC/Reset FIQ/IRQ are disabled according to [1]. Now i use RTOS, is this the job of the OS or i have to make explicit API call to turn on and off interrupts?

    Thank you 

    Sincerely Burim

     

    [1] Technical Reference Manual Page 184

  • 0 in reply to Burim Aliu
    TI__Intellectual 1470 points

    Burim,

    PBIST is designed to run at startup/power done only.

    Before you start the STC test, you need to save the context of the core.

    After reset you need to restore the content of the core.

    No additional interrupt enable is required.

     

    Cheers

    Marcus