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CCS/TMS570LC4357: HET is not generating interrupt

JDC
Intellectual 270 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Code Composer Studio

Hi,

I have created a code in HET IDE to act like a timer and generate an interrupt approximately every 50 ms

The instruction in HET is :   

and the code generate in the file .c is :

#include "std_nhet.h"

HET_MEMORY const HET_INIT0_PST[3] =
{

/* A0_0 */
{
0x00002C21, 
0x0001BBE4,
0x00000000,
0x00000000
}

};

 I have copied this code to my file het.c and I have changed        (void)memcpy((void *)hetRAM1, (const void *)het1PROGRAM, sizeof(het1PROGRAM));    to:   (void)memcpy((void *)hetRAM1, (const void *)HET_INIT0_PST, sizeof(HET_INIT0_PST));

In halcogen I have enabled HET1 driver and also the interrupt HET1 high in VIM position 10.

I also enabled the interrupt in INTENAS like this :  hetREG1->INTENAS = (uint32) 0x00000001U;

but the interrupt is not generated, am I missing something? or should I do something differently? I have tried already several things without a good result.

Thanks in advance.

  • 0
    TI__Guru**** 197156 points

    Hello JDC,

    N2HET interrupts can be generated by any instruction that has an interrupt enable bit in its instruction format. When the interrupt condition in an instruction is true and the interrupt enable bit of that instruction is set, an interrupt flag is then set in the N2HET Interrupt Flag Register (HETFLG).

    The flag in the N2HET Interrupt Flag Register (HETFLG) is set even if the corresponding bit in the N2HET Interrupt Enable Set Register (HETINTENAS) is 0.

    Please check HETFLG (bit 0 for instruction 0) when Register A = max value (113636) in CNT instruction.

  • 0 in reply to QJ Wang
    Intellectual 270 points

    Hi Wang,

    I have enabled the interrupt for that instruction, this has worked already and for some reason some times when I load the code it doesn't.

    Maybe this is related to my other question:

    thanks

  • 0 in reply to QJ Wang
    Intellectual 270 points

    Hi QJ Wang,

    I have a test program for HET (only with HET), with the same configuration described previously but adding 1 more count instruction, I have enabled the interrupt HET1 high in VIM position 10 and also both instruction interrupts in HETINTENAS, when I check the HETFLAG I see that the flags are generated but still the program doesn't enter the interrupt. see the registers:

    Could you give me some advise, please?

    Regards,

    J

  • 0 in reply to JDC
    TI__Guru**** 197156 points

    Hello,

    Yes, you got the interrupts (HETFLG=0x03) from the NHET instructions running in NHET RAM. The bit 0 of OFFSET2 is set, it means that instruction 0 generates an interrupt (priority level 2). Reading the offset register will automatically clear the corresponding N2HET interrupt flag. Did you read OFFSET1 register?

    Can you add a breakpoint in het1HighLevelInterrupt() function or het1LowLevelInterrupt() to check if you get an interrupt or not? Those two files generated through HALCoGen don't call hetNotification. If your checking point is in hetNotification(), you won't get notification of the interrupt.

  • 0 in reply to QJ Wang
    Intellectual 270 points

    Hi QK Wang,

    First I was reading offset1, so I enabled HET Low in VIM and added a breakpoint in  het1LowLevelInterrupt() and there the program will go, so I modified this file to call hetNotification() and then the timer worked.

    Unlike the first screenshot, offset 1 is not set, so I changed HETINTENAS to F (though I only have two instructions, both with interrupt) and offset 2 and 3 are generated, offset 1 is not.

    I will test tomorrow if this two offsets are set a the times I configured the 2 instructions to be.

  • 0 in reply to JDC
    TI__Guru**** 197156 points

    If two or more software interrupts are pending on the same priority level, the offset value will show the one with the highest priority. The interrupt with the highest priority is the one with the lower offset value. In your case, the 0x1 should be generated.