Please refer to SPNU499C section 19.11.53. Question: when the sample cap inside the ADC is discharged is the 16 pF parasitic cap between the input mux and the sample switch also discharged. The explanation for bit 0 in Table 19-58 of SPNU499C states that the internal sampling cap is connected to VREFLO. It does not say what happens to Cmux. Please refer to Figure 2 in TI document number SPNA118B for the location of Cmux.
Thank you,
John Colclough
