TMS570LC4357 connect using Segger j-link: Hercules™︎ safety microcontrollers forum

Hello,

There is a wrong signal mapping between 20-pin header and 14-pib header.

The TRST (pin 2 on TI-14) should be connected to nTRST (pin3 on J-Link) rather than RESET(pin 15 of J-Link).

QJ Wang said:

Hello,

There is a wrong signal mapping between 20-pin header and 14-pib header.

The TRST (pin 2 on TI-14) should be connected to nTRST (pin3 on J-Link) rather than RESET(pin 15 of J-Link).

Yes, i taken wrong picture before. When i connected as like in that picture, j-link led was red. So yes, now i have TRST connected to pin3 of j-link and not working, "Error: CPU-TAP not found in JTAG chain"

Hello,

I don't have J-Link for try. I don't the default J-Link speed, can you lower the speed for example 1Mhz.

Why does the script try to find a Cortex M3 core? TMS570/RM4x parts have a Cortex R4/5 core.

May be that is why it cannot find the CPU TAP.

I also noticed this, but the JTAG ID is correct (0x1B95A02F). I thought the J-Link may have a built-in cortex-M3. I haven't tried J-Link, so don't know the meaning of those messages.

Hello

Did you have any luck with J-Link connection to TMS570?

Hello, no i didn't solve it, today i will trying with lower speed. But i working with device, which could be locked jtag. Is it possible to get description of fault as I paste before, if some lock bits is set? Or maybe it is necessary to make some hardware preparation with boot resistors, because device does not stop to transmit on CAN bus, when i trying to connect via J-Link, like MCU didn't see my JTAG attempt...

Hello,

As Sunil mentioned, why the message shows Cortex-M3:

TMS570/RM4x (connect): Can not find Cortex-M3 (IDCODE mismatch)

This link may be helpful for you to find JTAG failure description.

http://software-dl.ti.com/ccs/esd/documents/ccsv7_debugging_jtag_connectivity_issues.html

Please try this procedure to let CPU enter a debug state:

• Open the target configuration window, and launch the selected the configuration
• Switch to debug window
• Press the reset (nRST) button and hold it
• Click “Connect Target” immediately after you release the nRST button
• The board should be connected after couple tries

Thanks, i will test this solution at evening. But how to pressing such button, if i use command window software call j-commander of my J-link tool. Do you mean to use J-flash or even code composer studio software, i've download few days ago?

nRST is warm reset or system reset button on TI HDK. I am not sure if nRST is used on your board.

Connect Target: is a command button in CCS or other IDE:

OK, I already tried and without succes. After connection wires and JLink to Code composer Studio, add J-Link update, then after attemt to connection got this:

I preparing 'reset' touching the nTRST to ground only and put it out with quick pressing 'connecton to target' and got this...

Hello. What does it mean access..? When i touching this nTRst signal to ground, then have a lot of errors during 'target connection' button pressed. And i confirm, touching this nTRst to ground doesn't stop device, in CAN output there is nice CAN signal all the time.

Hello,

Please try this procedure to let CPU enter a debug state:

• Open the target configuration window, and launch the selected the configuration
• Switch to debug window
• Press the reset (nRST) button and hold it
• Click “Connect Target” immediately after you release the nRST button
• The board should be connected after couple tries

It is not nTRST (JTAG test reset). It is the warm reset nRST. This device uses BGA package. If nRST (ball B17) is not routed out to a pad, or a header, or a terminal of other component, it is very hard to access this signal. 

I haven't reset button on pcb. There is possible that this device is protected, to don't use it pin.. I see the pcb path from pin number 2 of jtag pads, which going to one very small 3.3kOhm resistor and later to ground..

oh, i got it... not read carefully, even with your bold font (sorry). So I have to find B17 nRST and touch it to ground, and immediately pres connect after put ground out... Yes, so I know potential area of such nRST pad or point, but it can be everywhere on pcb, right? Is there such trick to find it anyway??

Best Regards

Do you have the board schematics and PCB layout? If no, it is very hard to find it.

No, i havent. This is final revision for customer pcb and MCU have bootlowader, that software is install via CAN, but i have to change bootlowader, that's why I trying to attemt using JTAG. So when I wrote about some trick, I meant in another units I had to solder some resistors to build boot voltage of such boot pins. But it was another MCU's not from TI. So another idea is touching all visible pins using ground, but through some small value resistor, to avoud some supply to not blown diodes, but to do somethin if will be touched nRST pin... Because I cannot desolder MCU, only trying to find this warm reset pin to get possibility to download dump from target...

:/

Please contact with the board support to get schematics or instruction to find the nRST signal. If the JTAG is secured, the JTAG will not be connected without the password.