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Original question:

Compiler/TMS570LS0432: ADC SAMPLE using interrupt

Compiler/TMS570LS0432: ADC set

whong zhao
Genius 4180 points
Part Number: TMS570LS0432

Tool/software: TI C/C++ Compiler

HELLO

 

  • 0
    Genius 4180 points

    why?

     RTI using interrupt time  is 50us, but,the adc also  use 50us,so little time run other things.

     I want 50 us one time  adc

  • 0 in reply to whong zhao
    TI__Guru**** 196736 points

    Hello Whong,

    How many ADC channels are sampled? How many us are used for your ADC sample+conversion? You don't have to read the conversion result after every conversion.

    The ADC module supports group memory threshold interrupt which can be used to significantly reduce the CPU load when using interrupts for reading the conversion results. 

    Another way to reduce the CPU load is to use DMA to transfer data from ADC memory to CPU SRAM:

    The ADC module can generate DMA request for a a specified number of conversion results being available in the group’s results’ memory.

  • 0 in reply to QJ Wang
    Genius 4180 points

    hello

      two channel .

       tms570ls0432 don't have  dma.   I dont know where I set wrong.    

       I find this link .

      I want to only 50us one time adc.

  • 0 in reply to whong zhao
    Genius 4180 points

    The RTI counter is configured to 50 uSec and it is started as before. Only interrupt is disabled.)

    Is it possible to trigger the sampling of ADC without enabling the RTI compare 0 interrupt?

     use you give me example, one time rti  50us,but adc and rti  are 50us

  • 0 in reply to whong zhao
    TI__Guru**** 196736 points

    The RTI compare0 interrupt condition can be used as a trigger source to trigger the ADC conversion. But you don't have to enable the RTI compare 0 interrupt in VIM module. You need to enable RTI compare 0 to generate the interrupt request which is used as the trigger.

    You will work out an example tomorrow for you.

  • 0 in reply to QJ Wang
    Genius 4180 points

    Thank you 

    You mean I don’t need to start the interrupt function in VIM, and the ADC is triggered set by the RTI hardware, but this code 

    {

    while((adcIsConversionComplete(adcREG1,adcGROUP1))==0);
    adcGetData(adcREG1, adcGROUP1,&adc_data[0]);

    Amplitude_value[AD_COUNT]=adc_data[0].value;

    }

    where I write,

  • 0 in reply to whong zhao
    Genius 4180 points

    Please give me an example

    Thank you 

  • 0 in reply to whong zhao
    TI__Guru**** 196736 points

    Attached is my example code to sample ADC triggered by rtiCOMP0

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/312/1121.TMS570LS0432_5F00_ADC_5F00_RTITrigger.7z

  • 0 in reply to QJ Wang
    TI__Guru**** 196736 points

    ADC gets triggered by either a rising edge or a falling edge (default) on the RTI compare interrupt line output from the RTI module.

    Here are the steps to get the RTI compare 0 interrupt to trigger the ADC:

    1. You need to enable the RTI compare 0 interrupt to be sent out of the RTI module. This causes a rising edge on the compare 0 interrupt line when the compare match event occurs.

      /* Enable RTI Compare 0 interrupt notification */
      rtiEnableNotification(rtiNOTIFICATION_COMPARE0);

    2. If you don't want to service this compare interrupt with the CPU, then disable the RTI compare 0 interrupt in the VIM. This means that the compare 0 interrupt will not be sent to the CPU

    3. The RTI module has a feature that allows you to clear the compare interrupt line automatically, without the CPU having to do this. This creates the falling edge on the RTI Compare interrupt line. The INTCLRENABLE (Compare Interrupt Clear Enable Register) is used to enable/disable this feature. The COMP0CLR (RTI Compare 0 Clear Register) is to hold the compare value at which the interrupt line is cleared. The value in this register is automatically incremented by the value programmed in the Update Compare Register.

      /* Enables the auto-clear functionality on the compare 0 interrupt.*/
      rtiREG1->INTCLRENABLE = (0x0A << 0);

      /* set value to RTI Compare 0 Clear Register*/
      rtiREG1->COMP0CLR = rtiREG1->CMP[0].COMPx + rtiREG1->CMP[0].UDCPx / 2;

    4. This mechanism allows you to create a programmable PWM signal on the RTI Compare interrupt line, so that you can trigger the ADC with the period that you want.