Part Number: TMS570LS0432
Hi!
The common SPI protocol says that the data register used for transmitting or receiving on SIMO and SOMI pins respectively is basically a circular queue i.e., when you transmit data (Say MASTER is TMS570LS0432 controller and Slave is some random device capable of SPI communication obviously), then the data that was there in the Slave data register buffer gets loaded in your data buffer as the SIMO and SOMI pins are connected in such a fashion. Therefore, if I just have to read some data from a Slave device, I will have to transmit some dummy data from my Master so that I receive the data.
However, in TMS570LS0432 there are separate transmit and receive buffers (TXBUF and RXBUF along with seperate interface registers namely the SPIDATA0/SPIDATA1 and the SPIBUF). Therefore, when I connect to a Slave device (CAT25640 EEPROM in my case), how do I go about a data transaction?
Basically, because there are seperate buffers for Tx and Rx in TMS570LS0432, do I need to follow/keep in mind the rule of pumping in Dummy data in order to receive data from slave or is it just so obvious that whatever data is transmitted from Slave upon requesting (lets say by some address) directly comes and sits in my SPIBUF register (or RXBUF) ?
Regards,
Chetan.