CCS/TMS570LS0432: MIBSPI COMMUCATION.

Hello Whong,

The SPIENA operates as a WAIT signal pin. For both the slave and the master, the SPIENA pin must be configured to be functional (SPIPC0[8] = 1).

An active-low signal from the slave on the SPIENA pin allows the master SPI to drive the clock pulse stream.

A high signal tells the master to hold the clock signal.

Hello

I have setted ENA.  mibspi data wait for enable also set.

but master the code ,run go on, 

while(mibspiIsTransferComplete(mibspiREG1, 0) == FALSE);  

Hello

 you are right.I found the problem.because the slave have mibspiTransfer. but,why the slave have sended data to master .slave dont install new data.when the

master want to send data to master ，maybe slave dont clear buffer？

How do I do，when the slave have sended the data to master，slave have no new data ，and master  wait 

Hello

when I use this code. in master and slave

mibspiREG1->TGINTFLG |= 0x00010000U;

I do not know if you know what I mean, first the slave communcation with master success.next  the slave CPU paused, this salve shound not respond the master.but now the salve still respon the master .

https://e2e.ti.com/support/microcontrollers/hercules/f/312/p/885644/3290762?tisearch=e2e-sitesearch&keymatch=mibspi%25252525252520tx#3290762

 please experts  give a solution