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CCS: TMS570LC4357 ic change exception handler (divided by zero)

MINWOO LIM
Expert 1200 points
Other Parts Discussed in Thread: TMS570LC4357

Tool/software: Code Composer Studio

I know TMS570LC4357 IC  become to abort state when divided by zero calculation is occurred.

I know divided by zero calculation error processing method can be changed as warning in arm core IC.

This error process change is need to me for some test.

If you know about this method, would you guide to me some example to change divided by zero calculation error processing method?

Best regard,

Minwoo

  • 0
    TI__Guru**** 197036 points

    Hello Minwoo,

    When DZ bit (19th) of SCTLR register is set, an Undefined Instruction Exception is generated. When DZ=0, it does not generate the exception. I don't find a way in ARM TRM how to generate a warning instead of exception if divided by zero.

  • 0 in reply to QJ Wang
    Expert 1200 points

    Hello QJ Wang,

    Thanks for your kind answer.

    I want to avoid generate exception and stop the firmware. I was wrong about warning action. so don't mind about warning instead of exception if divided by zero.

    I try to act TMS570LC4357 as your guide.

    I apply as follows,

    1.  In HL_sys_core.asm file,  the function : _coreInitRegisters_ 

    2. I add the code like this

      mov   r2,  #0x0
      mcr   p15, #0,  r2, c1, c0, #0x13

    But I think it is not work. Would you give me some guide where i apply  DZ bit (19th) of SCTLR register is set 0.

    Best regards,

    Minwoo 

  • 0 in reply to MINWOO LIM
    TI__Guru**** 197036 points

    Hello Minwoo,

    To use the SCTLR, ARM recommends that you use a read-modify-write technique. To access the SCTLR, read or write CP15 with:

    .def _coreEnableDZ_
    .asmfunc

    _coreEnableDZ_

    mrc p15, #0, r0, c1, c0, #0 ;read SCTLR
    orr r0, r0, #0x00080000 ; 19th bit, DZ
    mcr p15, #0, r0, c1, c0, #0 ;wrte sctlr
    bx lr

        .endasmfunc