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TMS570LS3137: Can we disable RAM ECC only but Enable FLASH ECC in TMS570LS3137

Part Number: TMS570LS3137

Hi ,

Our code is generating ECC nERROR pin was asserted (onboard red led ON), and the MCU refused to start. Now as the project is complex we not not sure if the error is due to RAM ECC or FLASH ECC part of code is being executed from RAM . 

Can we disable RAM ECC but Enable FLASH ECC in TMS570LS3137

Is there specific ECC error SFR where we can check what is source of the ECC error ( Flash or RAM )

following is the code that is enabling ECC for both RAM and FLASH

sys_startup.c

/* Enable CPU Event Export */
/* This allows the CPU to signal any single-bit or double-bit errors detected
* by its ECC logic for accesses to program flash or data RAM.
*/

_coreEnableEventBusExport_

mrc p15, #0x00, r0, c9, c12, #0x00
orr r0, r0, #0x10
mcr p15, #0x00, r0, c9, c12, #0x00
bx lr

/* Enable response to ECC errors indicated by CPU for accesses to flash */
flashWREG->FEDACCTRL1 = 0x000A060AU;


/* Enable CPU ECC checking for ATCM (flash accesses) */

_coreEnableFlashEcc_

mrc p15, #0x00, r0, c1, c0, #0x01
orr r0, r0, #0x02000000
dmb
mcr p15, #0x00, r0, c1, c0, #0x01
bx lr

  • Hello,

    _coreEnableRamECC_() and _coreDisableRamECC_() are defined in sys_core.asm.

    The Flash or RAM ECC error occurs, the corresponding bit in ESM status registers will be set. 

    Please refer to table 6-36, and table 6-34. 

  • Hi,

    You should still try and understand the source of the ECC error (and abort) by reading the CPU's abort address and abort status registers. In case of RAM ECC, this error typically occurs when there is a RAM access to an uninitialized location.

    Do you auto-initialize the CPU SRAM as part of the start-up sequence?

  • Hi ,

    Thanks for the lead on this issue.

    We had previously 3 versions of hardware boards and there we had the both RAM ECC and FLASH ECC enabled we never had issues with those 3 boards and 5 delivery builds with the ECC enabled .

    We did delta firmware changes and also the hardware is 4th iteration. Is there any possibility that some pins on hardware that can cause the RAM ECC or FLASH ECC.

    Thanks and warm regards

  • Hello,

    The best method to get to root cause would be to start with the CPU's abort status and address registers. It is difficult to surmise what change in firmware / hardware is causing the ECC errors.