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TMS570LS3137: Non-Volatile RAM for software reset

Lakshmikanth R S
Intellectual 790 points
Part Number: TMS570LS3137

Hi,

Is it possible to retain the values of RAM variables after software reset in TMS570LS3137?

I am looking for some protected RAM region in the controller which will be non-volatile after soft reset.

Please suggest an alternate solution to retain the RAM variables if no protected region is available.

  • 0
    TI__Guru**** 197036 points

    Hello,

    We don't explicitly state/guarantee the content of the SRAM can be preserved after a reset cycle. You should treat the SRAM content as suspect for corruption after a reset cycle and take steps to validate the contents. You can not assume the device will ensure the contents are preserved even if it seems to act like it on the bench.

    A warm reset can be due to various reset events such as OSC fail, watchdog reset, software reset and external reset. Software reset can be controlled by the CPU but others are not.

    When a reset happens in the middle of a write operation to the SRAM, it can result in corruption of the SRAM contents as the timing protocol to the SRAM may not be met.

    You can use the on-chip dedicated 128KB data-storage Flash bank (emulated EEPROM) for persistent storage.

  • 0 in reply to QJ Wang
    Intellectual 790 points

    Hello QJ,

    Thanks for the answers!!

    Unfortunately, we don't have access to internal flash to store the critical data. We are using external flash for this purpose.

    For the current use-case, we cannot dependent on external flash for data storage because it takes longer time to write and read.

    So, we are thinking of the possibilities to store in RAM. We expect the data to be retained only on warm reset. 

    I can understand from your response that the data can be retained in the RAM after warm reset but data validity cannot be ensured. Is my understanding correct?

    What are the steps should be taken to validate the RAM contents after warm reset?

  • 0 in reply to Lakshmikanth R S
    TI__Guru**** 197036 points

    Your understanding is correct.

    You can write the same data including checksum to several locations.

    BTW, the un-used peripheral RAM can be used to store data too.

  • 0 in reply to QJ Wang
    Intellectual 790 points

    We have to use CRC controller in TMS570 to verify checksum right?

    We are planning to operate CRC controller in Full CPU mode since we want to verify only the part of RAM where the critical data are stored.

    Could you please share an example on how to verify the particular region of RAM with CRC controller in Full CPU mode? 

  • 0 in reply to Lakshmikanth R S
    TI__Guru**** 197036 points

    Hi,

    This is a very good application note for using CRC module. It includes a link for source code:

    https://www.ti.com/lit/an/spna235/spna235.pdf?ts=1593492899652&ref_url=https%253A%252F%252Fwww.google.com%252F