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CCS/RM42L432: SL_SelfTest_Flash issue

Part Number: RM42L432
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Code Composer Studio

Dear team

The device is RM42L432. 

1  Problems were found when i used SL_SelfTest_Flash.

flash_stResult_1bt was ST_PASS when running  retVal = SL_SelfTest_Flash(FLASH_ECC_TEST_MODE_1BIT, TRUE, &flash_stResult_1bt); 

But  flash_stResult_2bt was ST_FAIL; when running retVal = SL_SelfTest_Flash(FLASH_ECC_TEST_MODE_2BIT, TRUE, &flash_stResult_2bt);

What may cause the difference?

2  Besides,I enabled interrupt trigger and nerror pin in FLASH_ECC_TEST_MODE_1BIT mode in HALcogen.

However, it does not trigger an interrupt and pull the pin low during operation.

BR,

SUSAN

  • Hello Susan,

    When 2-bit ECC error occurs, the data abort is generated to CPU. The abort handler (abort.asm) clears the flash status and ESM group3 status register. When the code returns back to sl_selftest_flash(), and check the flash and ESM status registers, and does not find the error flag, so the test failed.

    For FLASH_ECC_TEST_MODE_1BIT, when error occurs, the ESM channel 6 in ESM status register should be set. Is the IRQ or FIQ enabled in your test? It was disabled by default.

  • Thank you very much. 

    So how to deal with the problem of 2bit? For 1bit, I enabled interrupt and NERROR in HALCogen. And I execute the following function can trigger the interrupt and pull down the NERROR pin

  • Any update?

  • Hello Susan,

    Sorry for late response. As I said, for 2-bit ECC error in diagnostic mode, the ESM group 3 flag and FEDACSTATUS error flag are cleared in dbort ISR, and nRROR pin will become inactive.

    You can find the error address by reading the flash un-correctable error address register (FUNC_ERR_ADD).