CCS/RM48L952: RM48L952

Hello,

RM48 device has an external clock prescaler (ECP) modules that when enabled, outputs a continuous external clock on the ECLK terminal. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. So the ECLK is one option for you.

The maximum clock for ADS123 (non high speed mode) is 27MHz. Does 20MHz or 25MHz or 26MHz work for your application?

ECLK output is VCLK/programmable divider. If System clock is 200MHz, and VCLK=100MHz, ECLK=100/4=25MHz

Hi Wanj, 

Thanks for reply me earlier and suggestion.

In our final designed board,  they have connected one of the  NHET  pin to ADS1278 CLK pin. I have to acquire 16k samples in my project. 

Can you please explain me that ,

I have configured system clock as 100MHz , which is going to NHET peripheral . HR clock prescalar is divided by 0 so HR clock is 100MHz  and LR(Loop resolution) clock prescalar is 7  so LR clock is 1/1280ns = 781250Hz ==>0.781Mhz .

NHET  module is looks difficult to understand, i have read datasheet . I try to find the width of the cointer register but i meet that i looks 25bit counter is it right?  

Can you please explain me,  what is the min time can set for Loop time to achieve 27MHz for ads1278.

For max clock frequency which i have provide to NHET module,  what is the min and max frequency i can generate from pwm? I tried to understand this nhet but i starts reading there was instructions and data it confusing me..

So expalin me,  what is the width of the pwm counter size and  min and max frequency which can generate?  

Reply me soon as possible wang. 

Hi,

Please don't use the NHET example in HALCOGen. It configures LRP as 128HRP which doesn't fit your application.

Please use HET IDE to simulate your NHET code, then generate code (*.c) , then copy this code to NHET RAM.

https://www.ti.com/tool/HET_IDE

The maximum PWM frequency for 100MHz is 12.5MHz

VCLK=100MHz, NHET clock=100MHz, HR clock=100MHz, and LRP=40ns (LR prescale=2)

The NHET code:

; Simple PWM
L00 CNT { next=L01,reg=A,irq=ON,max=1}; 
L01 ECMP { en_pin_action=ON, pin=1, action=PULSELO, reg=A, data= 1, hr_data=0}          ---> N2HET[1] is used 
L02 BR { next= L00, cond_addr=L00, event= NOCOND }

Generated c code:

#include "std_nhet.h"

HET_MEMORY const HET_INIT0_PST[3] =
{

/* L00_0 */
{
0x00002C21,
0x00000001,
0x00000000,
0x00000000
},

/* L01_0 */
{
0x00004000,
0x00404108,
0x00000080,
0x00000000
},

/* L02_0 */
{
0x00001A00,
0x00000000,
0x00000000,
0x00000000
}
};

Generated header file:

#ifndef __NHET_01_h
#define __NHET_01_h

#define HET_v2 1
#define AID1_7

#include "std_nhet.h"

#define HET_L00_0 (e_HETPROGRAM0_UN.Program0_ST.L00_0)
#define pHET_L00_0 0

#define HET_L01_0 (e_HETPROGRAM0_UN.Program0_ST.L01_0)
#define pHET_L01_0 1

#define HET_L02_0 (e_HETPROGRAM0_UN.Program0_ST.L02_0)
#define pHET_L02_0 2

typedef union
{
HET_MEMORY Memory0_PST[3];
struct
{
CNT_INSTRUCTION L00_0;
ECMP_INSTRUCTION L01_0;
BR_INSTRUCTION L02_0;
} Program0_ST;

} HETPROGRAM0_UN;

extern volatile HETPROGRAM0_UN e_HETPROGRAM0_UN;

extern const HET_MEMORY HET_INIT0_PST[3];

#endif

Hello Wang,

Thanks for your suggestion.

I will install the HET IDE and check it once.

If i provide 12.5MHz to ADS1278, Is it ok to acquire 16K sample and also

In my project,  i need to generate 3 PWM output signal which is of range 1Hz to 3KHz frequency.

With this above configuration how to make code wang and if i add 3 PWM signal + 1 PWM signal for ADS1278 then, It will reduce yeah further frequency.?

Can you please send me a code for 3 PWM signal + 1 PWM signal for ADS1278 using HET IDE. With this configuration how can i achieve max frequency from PWM?

Regards,

Anand Kumar.