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TMS570LC4357: TMS570LC4357

Part Number: TMS570LC4357


Although it is not necessary to configure the PRESCALE value, is there any requirement for the ratio between VCLK and SPICLK?

  • Hi,

    SPICLK=VCLK/(PRESCALE+1). The maximum SPICLK is 25MHz. 

  • Hello Mr. Wang,

    the problem is not the definition of the maximum SPICLK but to find the minimum VCLK at maximum SPICLK.

    The reason for this is that I want to run the GCLK at 240...260 MHz. HCLK is derived from GCLK with: HCLK = GCLK / (1, 2 or 4). And VCLK is derived from HCLK with: VCLK = HCLK / (1 ... 16).

    So if it is possible that VCLK is 25 MHz (while running SPI as slave with 25 MHz), HCLK can be 125 MHz and GCLK can be 250 MHz. So: is this possible?

    In https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/918392 you said that:

    "The SPICLK is driven by the SPI master. The prescale is not used by the SPI slave. The description in TRM is correct. For SPI slave, whatever the PRESCALE is configured, the input SPI clock should meet this requirement: period >= 40ns or the SPICLK frequency <= 25MHz"

    Which of your statements is correct for the problem I described above?

    Regards,

    K. Zimmermann

  • Hello,

    In slave mode, the PRESCALE register in the SPI/MibSPI module does not need to be configured. However, the VCLK frequency must be at least twice the expected SPICLK frequency.

    Internally the SPI/MibSPI module uses VCLK to sample the incoming SPICLK and then uses the sampled clock signal for driving the SOMI and nENA signals.