TMS570LC4357: MIBSPI DMA example code

Hello Chandra,

Please try the following function to configure DMACTL register. The RXDMA_MAP should be at bit 20th rather than 4th bit.

void mibspiDmaConfig(mibspiBASE_t *mibspi,uint32 channel, uint32 txchannel, uint32 rxchannel)
{
uint32 bufid;
//uint32 bufid = (channel + 1) * E_COUNT - 1;

if (mibspi == mibspiREG1){
bufid = tgPSTART1[channel] + E_COUNT - 1;
}else{
bufid = tgPSTART3[channel] + E_COUNT - 1;
}

/* setting transmit and receive channels */
mibspi->DMACTRL[channel] |= (rxchannel << 20) | (txchannel << 16);

if (F_COUNT > 1) {
mibspi->TGCTRL[channel] &= 0xBFFFFFFF; // Disable ONESHOT
} else {
mibspi->TGCTRL[channel] |= 0x40000000; // Enable ONESHOT
}

/* enabling transmit and receive dma */
mibspi->DMACTRL[channel] |= 0x8000C000;

/* setting Initial Count of DMA transfers and the buffer utilized for DMA transfer */
mibspi->DMACTRL[channel] |= (bufid<<24);

/* Enable Large count transfer */
mibspi->DMACNTLEN = 0x1;
mibspi->DMACOUNT[channel] = (F_COUNT - 1) << 16;

}

Hi,

Looks like the code missing few definitions.

1. What is tgPSTART1[channel] array and the initialization.

2. What is tgPSTART3[channel] array and the initialization.

3. What is E_COUNT and the initialization (is it End count?)

4. What is F_COUNT and the initialization (is it First count?)

Chandra

Hello Chandra,

E_COUNT is element count, F_COUNT is frame count.

tgPSTART1[channel]  is PSTART in TGxCTRL register, for TG0, PSTART is 0

Hi Wang,

Still no success after implanting the function provided by you.

I am attaching the updated project again. Please check. I might be not understood the DMA transfer properly.

Please give me the corrected project, so that I can verify my mistakes.

Thanks.

Chandra3833.MIBSPI_DMA (updated).zip

Dear Wang,

Eagerly looking for help. Even if you have a working project to share, that will help me  a lot.

Chandra

Thanks Mr. Wang for sharing the example project.

After looking the code, I am assuming that SPI1 is configured as master and SW loop-back mode and SPI3 is configured as slave mode.

There are three main files, and I have used HL_sys_main file keeping the other two excluded from project. 

I have not connected SPI1 and SPI3, wanted to check only SPI1 loop-back.

Looks like it is not working after executing the main. Attaching the screen capture of the memory section of TX and RX.

Please check once and help me.

Chandra

Hi Wang,

I had gone through the document already and also most of the e2e forum threads on this topic.

I am just looking at the simple case of SW loop-back operation to work on my board.

I can see that the shared RAM being configured properly, as the TX buffer being loaded with data. 

Unfortunately, the example code you have provided is also not working with me for the loop-back.

Request to please verify the code on your single board, for loop-back on SPI1 is working fine.

Chandra