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Dear Team of the Hercules support,
The thread <https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/583411> gives an idea how to test the Level 2 SRAM Adress and Control bus Parity on a TMS570LS3137.
But as the ADDR_PARITY_OVERRIDE bits are present in the TMS570LC4357 the idea suggested in the above thread may be valid for a TMS570LC4357 too.
My issue is that i don't know which ESM Error will be fired if ADDR_PARITY_OVERRIDE will be set to 0xA. In the TMS570LS3137 the less severe ESM 2.10 and 2.12 will arise.
The difference to the TMSLC4357 is that in the TMS570LS3137's datasheet the respose to a Diagnostics Address/Control parity error is called. In the DS of the TMS570LC4357
there is no ESM channel called for Diagnostics Address/Control parity errors.
(Q1) I suppose that if ADDR_PARITY_OVERRIDE is set on a TMS570LC4357 an ESM 2.7 will come up but not an ESM 3.15 error. Am i right?
Thank you very much
Stephan
Hello Stephan,
The ESM 3.15 will be set for SRAM address/control parity error. Please refer to Table 6-46 of DS.
Good morning, QJ,
Sorry for bothering you again, but my actual question is
(Q1) If a SRAM address/control parity error is forced on a TMS570LC4357 by setting ADDR_PARITY_OVERRIDE will an ESM 3.15 error come up too?
Thank you in advance! Enjoy the weekend!
Stephan
Hello Stephan,
Yes, ESM 3.15 will be set, and PACE bit of RAMERRSTATUS register will be set as well.