TM4C1294NCPDT: UART receive time-out

Dennis McGlumphy

Part Number: TM4C1294NCPDT

Dear Sirs

The TM4C1294NCPDT has a UART receive time-out interrupt. I have not found any references to what actually causes the interrupt or what the time lap is. Please explain. Thank you.

over 5 years ago

0 Ralph Jacobi over 5 years ago

TI__Guru*** 135355 points

Hello Dennis,

The RX timeout interrupt is a method for the UART interface to inform the application that it has stopped receiving data and therefore the FIFO-level interrupts will not occur.

From the datasheet, page 1170:

The receive timeout interrupt is asserted when the receive FIFO is not empty, and no further data is received over a 32-bit period when the HSE bit is clear or over a 64-bit period when the HSE bit is set. The receive timeout interrupt is cleared either when the FIFO becomes empty through reading all the data (or by reading the holding register), or when a 1 is written to the corresponding bit in the UARTICR register.

This thread may have some beneficial discussion for you as well: https://e2e.ti.com/support/microcontrollers/other/f/908/t/433175

0 Dennis McGlumphy over 5 years ago in reply to Ralph Jacobi

Expert 1390 points

Dear Mr. Jacobi

Thank you for the quick response. Which clock is used for the 32 bit and 64 bit timers?

0 Ralph Jacobi over 5 years ago in reply to Dennis McGlumphy

TI__Guru*** 135355 points

Hello Dennis,

The timing period is based on your UART baud rate. It will be the time to send 32 or 64 bits at the baud rate which has been configured.

0 Dennis McGlumphy over 5 years ago in reply to Ralph Jacobi

Expert 1390 points

Thank you. This resolves my issue.

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TM4C1294NCPDT: UART receive time-out