• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 31 subscribers
  • Views 408 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

Warm reset in software

Compiler/TMS570LS0432: CPU warm reset cold reset problem

whong zhao
Genius 4190 points
Part Number: TMS570LS0432


Tool/software: TI C/C++ Compiler

Hello

 Team

Now My environment is that tps65381 NRES connect to cpu nPORRST, and cpu nRST connect to pull up.

question :

1.  what doese Cause of warm reset reason?and Do I need to set up hardware or software.

Voltage Monitorreset  :warm? or cold

Oscillator failure :warm? or cold

Software reset :warm? or cold

2.if warm reset the program start in main or start up?

3 if warm reset ,the RAM data isn't cleared?

  • 0
    TI__Guru**** 199096 points

    Hello Whong,

    We don't explicitly state/guarantee the content of the SRAM can be preserved after a reset cycle. You should treat the SRAM content as suspect for corruption after a reset cycle and take steps to validate the contents. You can not assume the device will ensure the contents are preserved even if it seems to act like it on the bench.

    A warm reset can be due to various reset events such as OSC fail, VMON, watchdog reset, software reset and external reset. Software reset can be controlled by the CPU but others are not. nPORRST is cold reset.

    When a reset happens in the middle of a write operation to the SRAM, it can result in corruption of the SRAM contents as the timing protocol to the SRAM may not be met.

    You can use the on-chip dedicated 128KB data-storage Flash bank (emulated EEPROM) for persistent storage.