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CCS/TMS570LS3137: TMS570 Interrupt function problem

whong zhao
Genius 4190 points

Part Number: TMS570LS3137

Tool/software: Code Composer Studio

Hello

 Team

 The  TMS570 CPU . when A interrupt function is running,At this moment another B interrupt function  is responded.

so  dose the cpu break A function？

or dont break ,when A function run over and run B.

 Is it related to the interrupt level？

There seems to be no interrupt priority for tms570

  • 0
    TI__Guru**** 199196 points

    Hi Whong,

    1. The TMS570 provides two vectors for interrupt requests: FIQs and IRQs. FIQs are higher priority than IRQs, and FIQ interrupts may interrupt IRQ interrupts.

    2. The TMS570 uses VIM to prioritize and control the interrupt sources. VIM supports 128 interrupt channels which are mapped to interrupt sources. A lower numbered channel in each FIQ and IRQ has higher priority. 

    3. The ARM Cortex-R4/5 processor does not support interrupt nesting in hardware. It does not support more than one IRQ to be taken at a time. 

    When two IRQ interrupts (or 2 FIQ interrupts) occur at the same time, the interrupt with higher priority is serviced first. The 2nd interrupt will be served after the 1st is done. 

  • 0 in reply to QJ Wang
    Genius 4190 points

    Hello 

    QJ

     What are hardware interrupts and what are software interrupts in TMS570

    Thanks and Regards

  • 0 in reply to whong zhao
    TI__Guru**** 199196 points

    Hello,

    Hardware interrupt is an interrupt generated from hardware: IRQ and FIQ

    The TMS570 system module provides the capability of generating up to four software interrupts. A software interrupt is generated by writing the correct key value to either of the four System Software Interrupt Registers (SSIRx).

    Please use a new post for any new question. 

     

  • 0 in reply to QJ Wang
    Genius 4190 points

    Thank you