I have a question regarding emac/mdio interrupt control. We are trying to limit the number of interrupts in case of short Rx burst by utilizing isr pacing. It does not really matter if in case of short bursts some packets are lost either. I don't understand how to calculate the INTCONTROL register, field INTPRESCALE. Can you please explain this or point me to the document which describes interrupt pacing in more detail?
We use a setup with TMS370LS3137, core clock frequency is 180MHz, EMAC is clocked at 90MHz and MII interface.
Thank you,
Charan Varghese