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Original question:

Prefetch entry when using flash api

TMS570LS1224: PrefetchEntry with F021 API when interrupts are enabled, no prefetchEntry when interrupts disabled.

Mihail Milchev
Intellectual 500 points
Part Number: TMS570LS1224


Dear TI Experts,

The use case for the application I am developing is the following:

  1. Erase a sector in flash bank 0.
  2. Write a pseudo-random pattern (0x5A..5A) to the same sector.
  3. Verify that writing was successful by comparison of the flash contents with the original pattern.

I am struggling with the following:

  • I get a prefetchEntry when erasing the flash bank sector when interrupts are turned on.
  • When interrupts are turned off using the function _disable_interrupt_(), the whole use case gets executed correctly.

Is it necessary to have the interrupts turned off in order to successfully erase/reprogram flash?

Kind regards,

Mihail

  • 0
    TI__Guru**** 198546 points

    Hello Mihail,

    The F021 Flash API does not disable interrupts. Interrupts only need to be disabled if there is an active Flash operation (Erase, Program) on the bank where the interrupt vectors are stored.

    Since TMS570LS1224 has only 1 flash bank, the interrupt should be disabled before performing flash operation (erase, program).

  • 0 in reply to QJ Wang
    Intellectual 500 points

    Thank you for the reply!

    This answers my question mostly, however, it is still unclear to me why would the application want to read from the interrupt vectors during a Flash operation?

    Can you please point me to a source of information describing why it is necessary to disable interrupts for an active Flash operation to take place? I used the F021 Flash API Reference Guide (SPNU501H), but it did not deliver any information regarding this.

    Thank you in advance!

    Kind regards,

    Mihail Milchev

  • 0 in reply to Mihail Milchev
    TI__Guru**** 198546 points

    When any peripheral occurs, the VIM prioritizes and signals IRQ/FIQ to ARM Cortex-R4, then ARM Cortex-R4 fetches from flash 0x18/0x1C. This is why the interrupt should be disabled before flash erase/program operation.

    Please refer to VIM chapter of TRM too.