Configuration of SPI interface as slave seems to be influencing the chip select signal

Steve Newnham

Other Parts Discussed in Thread: TMS570LS20216, HALCOGEN

Hi,

I have a TMS570LS20216 USB stick and running the SPI slave demo code (example_mibspi_halcogen_ccs_c_project.zip) obtained from the TMS570 wiki (http://processors.wiki.ti.com/index.php/Category:TMS570) in the 'Training & Videos' section. This zip contains an SPI slave project that I am running with no changes to the code.

I have the:

MibSPI1SOMI,
MibSPI1SIMO,
MibSPI1CLK,
MibSPI1CSO

pins connected to an SPI device that is acting as master. I can successfully transfer data from master to slave and vice versa. However, when observing the chip select signal on an oscilloscope the chip select signal appears to behave in a strange way.

1.   When the TMS570 (slave) is not connected to the master the chip select of the master is observed to vary between 0 and 3.3 V. This is as expected.

2.   When the TMS570 (slave) is connected to the master, but no slave software running, the chip select is observed to vary between 0 and 3.3 V.    This is as expected.

3.   When the TMS570 (slave) is connected to the master and the slave software running, the chip select is observed to vary between 0 and 200 mV.    This is not as expected.

From the above observations, I conclude the chip select is being influenced by the slave software running on the TMS570. I have read the TRM and felt that reversing the pull-up pull-down selection during SPI initialisation may have an effect:

    /** - SPI1 Port pullup / pulldown selection */
    spiREG1->PCPSL = 0        /* SCS[0] */     // SKCN - was 1 changed to 0
                    | (0 << 1) /* SCS[1] */     // SKCN - was 1 changed to 0
                    | (0 << 2) /* SCS[2] */     // SKCN - was 1 changed to 0
                    | (0 << 3) /* SCS[3] */
                    | (1 << 8) /* ENA */
                    | (1 << 9) /* CLK */
                    | (1 << 10) /* SIMO */
                    | (0 << 11); /* SOMI */

but it does not.

Can you help me diagnose what configuration of the SPI slave interface is influencing the chip select line?

over 14 years ago

0 Jean-Marc Mifsud over 14 years ago

TI__Mastermind 22375 points

Steve,

I've checked this demo code, and the Chip Select are not used in this code.

If I understand your configuration, you have a master SPI that drives the CS.
The slave code that you are using for the TMS570LS20216 USB stick is not configure to use the CS as input.
In the SPI initialization code, the CS[0], CS[1] and CS[2] are configured as GIO Out and drive a level 0.

This explain the problem you are facing.

I recommend to use HalCogen to open the project for the slave SPI and change the definition to use the CS[0] as a SPI CS line.

Please let me know if you need help with HalcoGen.

Regards,

Jean-Marc

0 Steve Newnham over 14 years ago in reply to Jean-Marc Mifsud

Intellectual 635 points

Jean-Marc,

thanks for your raply.

I understand what you say and will configure the CS[0] to be a SPI CS line rather than GIO Out.

I will let you know how I get on.

As an aside, I did notice that when the chipselect connection between the master and slave was disconnected the slave no longer received received data/received incorrect data. Is that the behaviour you would expect even though CS[0] was not configured as a SPI CS line?

Steve

0 Jean-Marc Mifsud over 14 years ago in reply to Steve Newnham

TI__Mastermind 22375 points

Steve,

When the slave is not using the CS line, It will receive data just by using the SIMO and CLK line.
In other words, it is not suppose to look to the CS line at all.

It is possible that the problem is coming from the master side , trying to assert/deassert his CS line.
The CS line will not be able to be active high (because of the slave driving it low) This could create problem, but I can't say for sure.

Please let me know the result after changing the code on the slave side.

Regards,

Jean-Marc

0 Steve Newnham over 14 years ago in reply to Jean-Marc Mifsud

Intellectual 635 points

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Hi Jean-Marc,

I have not forgotten this thread and my promised reply.

It will be another week or so before I have an opportunity to test your suggestion.

Regards,

Steve

0 Brian Fortman over 13 years ago in reply to Steve Newnham

TI__Expert 7650 points

Hi Steve,

Is this still open or can we close this thread now?

Thanks, Brian

0 Steve Newnham over 13 years ago in reply to Brian Fortman

Intellectual 635 points

Soon after my last post on this thread, I stopped work on our SPI hardware. However last week work was resumed on it, so I would like to see if I still have the problem in the next few weeks. So please leave thread open.

0 Brian Fortman over 13 years ago in reply to Steve Newnham

TI__Expert 7650 points

Thanks for the update. Looking forward to hearing your results.

0 S Tsuei over 13 years ago in reply to Brian Fortman

TI__Intellectual 1030 points

Since we haven't heard back from you with notice of further issues on this, we will go ahead and close out this thread.

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Configuration of SPI interface as slave seems to be influencing the chip select signal