TMS570LC4357: Microcode and the PBIST controller

Peter,

The PBIST engine consists of a small (proprietary) CPU with an instruction set targeted specifically towards testing memories. This CPU includes both control and instruction registers necessary to execute the individual memory algorithms. The memory configuration information is stored into on-chip memory (PBIST ROM). The test algorithm code is also loaded into the PBIST ROM such that only the execute command is necessarily loaded by the application.

We do not support / recommend writing your own microcode for this PBIST engine.

Regards, Sunil

Hi Sunil,

Thanks for the confirmation and clarification.  I will double-check with the team to determine if there are any follow-up questions.

Regards,

PeterC

Hi Sunil,

We do have more questions related to this topic:

1. Does the PBIST ROM contain any TMS570 native code?

2. How can we be sure that this PBIST controller couldn't get tripped accidentally and corrupt SRAM memory?

3. Is there something we can do to ensure this PBIST coprocessor is dormant when the TMS570 is operating nominally?

BR,

Peter Chan

Hi Peter,

See comments below.

1. Does the PBIST ROM contain any TMS570 native code?

>> No.

2. How can we be sure that this PBIST controller couldn't get tripped accidentally and corrupt SRAM memory?

>> You do need to set up multiple registers in order to initiate self-test on a selected SRAM instance. It would require the application to intentionally configure these registers in order to trigger a memory self-test.

3. Is there something we can do to ensure this PBIST coprocessor is dormant when the TMS570 is operating nominally?

>> Yes, there are some options:

1. You could periodically read from the PBIST control registers in the System module register frame to ensure that these are not accidentally overwritten.
2. These control registers are writable by the CPU only in a privileged execution mode. You can use this protection and make sure that most of the application that does not need to configure control registers runs in the user mode. Then if a process accidentally tries to write to a control register, you will get an abort, although asynchronous.

Hi Sunil,

Thanks for the quick response and suggestions.  Hopefully, this is the last question:

For question #3 above, suggestion #2 is reasonable.  I'm just curious if there is a way to just power off this PBIST coprocessor to avoid any potential issues?

BR,

Peter Chan