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RM57L843: F021 library requires disabling interrupts to work properly

Part Number: RM57L843

Hello TI,

We are using the F021 flash library to write a code binary to either flash bank 0 or flash bank 1 from code executing in the other flash bank. We are doing the flashing operation in a process managed by an industry standard RTOS. We were getting very difficult to diagnose errors until we disabled interrupts completely around the flash API calls. This stabilized the flashing operation to the point where we no longer get failures. TI document spna117a.pdf for the TMS570LS20x/10x device recommends completely disabling interrupts for the flashing operation, as we have done. Does this recommendation also apply to the RM57L843?

Thank you in advance,

Bill Willcox

Veo Robotics

 

  • Hello Veo,

    The F021 Flash API does not disable interrupts. The users need to determine if the interrupt should be disabled or not. Interrupts only need to be disabled if there is an active Flash operation (Erase, Program) on the bank where the interrupt vectors are stored.

    If the interrupt ISR and vectors are stored in bank0, and you erase sectors of bank1 only, the interrupt doesn't have to be disabled. 

    But if you want to erase the sectors of bank0 (flash API related code is executed from SRAM), the interrupt has to be disabled. 

  • Thank you for the quick reply!

    The documentation indicates it is acceptable to flash bank 0 from code running in bank 1. Is this correct (your reply indicates running in SRAM)?

    Thank you and Best Regards,

    Bill

  • Yes, you can erase sectors of bank 0 from code running in bank1. Since the exception vector table is always located at 0x000000000 (bank 0), you need to disable the interrupt. 

  • Thank you again!

    Best Regards,

    Bill