Part Number: TMS570LS3137-EP
Other Parts Discussed in Thread: HALCOGEN
Hello,
I am having trouble finding the EMIF interrupt handler in the VIM table. According to the Technical Reference Manual, if a bit in the EMIF Interrupt Masked Register is set it will send an active-high pulse to the CPU interrupt controller. I have looked through both HalcoGen and the TRF and am unable to find which VIM Address is signaled.
Overall, I am attempting to work around the Errata for EMIF#3 where when an asynchronous timeout occurs and a dummy read must be done to resolve this.
Where is this active high sent or how can I handle it?
Thanks,
David Cothran