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TMS570LC4357: EMIF Write Hold time is long

user5093781
Intellectual 385 points

Part Number: TMS570LC4357

Hello. I'm setting the register as below. AWCC:0xE00000FF CE4CFG:0x04522299 EMIF CLK:75MHz However, it takes about 290 nsec from when the write signal becomes Hi until the CS signal becomes Hi. Why? Best Regards.
  • 0
    TI__Guru**** 199386 points

    Hi,

    The typical output hold time (WE high to CS high) is WH*E. WH is Write hold time defined in CEnCFG register.

    The Write hold time is independent of the wait signal. The input wait pin is to extend the strobe period of an access when the wait input is asserted. The maximum wait cycles is determined by the EWC value programmed in WCC register.